Cher3 2(ver 1.7)en

LEVEL 3-2

(version 1.7)

Inventory  Chapter 1. NB scheme  Chapter 2. POWER  Chapter 3. CHARGE  Chapter 4. CLOCK  Chapter 5. HDMI  Chapter 6. Touch Pad  Chapter 7. Keyboard  Chapter 8. AUDIO

P5~P77 P78~P185 P186~P223 P224~P247 P248~P261 P262~P279 P280~P292 P293~P328

Inventory  Chapter 9. MODEM  Chapter 10. USB  Chapter 11. PCMCIA  Chapter 12. IEEE 1394  Chapter 13. Card Reader  Chapter 14. SATA  Chapter 15. ODD  Chapter 16. LAN

P329~P338 P339~P358 P359~P363 P364~P380 P381~P393 P394~P400 P401~P409 P410~P430

Inventory  Chapter 17. VGA  Chapter 18. LCD  Chapter 19. BIOS  Chapter 20. MEMORY  Chapter 21. POST CODE  Chapter 22. NEW CARD  Chapter 23. EC

P431~P446 P447~P485 P485~P511 P512~P538 P539~P584 P585~P590 P591~P621

Chapter 1 NB scheme

Overview  Introduction  Diagram  Q & A (Repair Experience)

Introduce  Intel Product  AMD Product  EeePC Product

Intel Chip Family & Comparison

Intel Centrino Evolution Centrino 5=(Centrino2)

Centrino1-4==(Centrino1)

(Core™2 Duo ) Platform code

Carmel

Sonoma

Napa

Santa Rosa

Montevina

CPU Code

Banias (130nm)

Dothan (90nm)

Yonah (65nm, Dual Core)L2=2MB

Merom (65nm, Dual Core)L2=4MB

Penryn (45nm,Dual/Four Core)L2=6MB

Support DDR

DDR-333

DDR2-533

DDR2-667

DDR2-667

DDR3-1066

CPU Catch (L2)

1 (1M)

1 (2M)

2 (2M/4M)

2 (4M/6M)

2/4 (6M)

GMCH (FSB)

Odem+ MontaraGM (400MHz)

Alviso (533MHz)

Calistoga (667MHz)

Crestine (800MHz)

Cantiga GM/PM (1066MHz)

ICH

ICH4-M

ICH6-M

ICH7-M

ICH8-M

ICH9-M

Wi-Fi

Calexico (b)

Calexico2 (a/b/g)

Golan (a/b/g)

Golan 2 (n)

Echo peak/Shirley Peak

(802.11)

WiMAX & n / (n)

Intel Centrino Evolution Core Platform Code CPU Code

Calpella Clarksfield(Nehalem) Auburndale(Nehalem) (45nm)(Internal DDR3 (45nm)(Internal DDR3 memory memory controller with controller) graphic chip)

Arrandale(Westmere) CULV(32nm)

Support RAM

DDR3-1066/1333

DDR3-1066/1333

DDR3-1066

CPU Catch (L3)

4/2 (8 M)

2 (4M)

2 (4M)

ICH

IbexPeak-M(DMI)

IbexPeak-M(DMI)

IbexPeak-M(DMI)

Wi-Fi

Puma Peak / WiMAX 的”Kilmer Peak”

Shirley Peak/ Echo Peak

Shirley Peak/ Echo Peak

Intel Centrino Evolution Core2 Platform Code

Huron River

CPU Code

Sandy Bridge (32nm)

Support DDR

DDR3-1066/1333

CPU Catch (L3)

4/8 (8 M)

ICH

QS67, QM67, HM67, HM65, UM67

Wi-Fi

Centrino Advanced-N + WiMAX 6150

Intel Chip Family & Comparison

Intel Chip Family & Comparison

Montevina vs Calpella

Calpella vs Huron River

Diagram

Sonoma Platform Napa Platform Santa Rosa Platform Montevina Platform Calpella Platform Sandy Bridge Platform

Sonoma Platform Diagram-1

Sonoma Platform Diagram-2

Napa Platform Diagram-1

Napa Platform Diagram-2

Santa Rosa Platform Diagram

Santa Rosa Platform Diagram Crestline / ICH8M 芯片

Montevina Platform Diagram

Calpella Platform Diagram (Clarksfileld)

Calpella Platform Diagram (Auburndale)

Sonoma Diagram – M51A Sample •

CPU

GMCH Core Frequency 333MHz • 12.1” active matrix TFT, • XGA 1024x768 resolution,

CRT

LCD Con.& Inverter

Dothan

Alviso (GMCH) 915GM

•IDE BUS •Ultra ATA 100/66ICH6-M

•Combo drive •Dual drive •Super multi drive

•2.5” 30/40/60/80 GB •4200/5400RPM •Azalia Link

Headphone -out Jack / Int. SPK

MINI PCI Slot

•On board 256M DDR2 SDRAM 400 MHz design

•1 x SODIMM socket for expansion up to 768GB DDR2-400/533 DRAM support •PCI BUS ,33MHz

LAN 控制ler RTL 8101L

Cardbus R5C841

RJ-45 IEEE 1394

•LPC BUS ,33MHz

Audio CODEC ALC861

Int. & Ext. MIC

Memory DIMM

•DMI Link ,100MHz

•USB 2.0

USB 2.0 X3 port

•

Intel Pentium M Processor Speed at 1.6G~2.13GHz (Dothan) • 2MB On-Die L2 Cache

•400/533 MHz FSB •DDR2 SDRAM 400/533 MHz •DDR1 SDRAM 333 MHz •Dual Channel support DDR2 •Single Channel support DDR1

•LVDS •D-Sub 15 pin

•

Modem Module

FWH SST 49LF004A

KBC M38857

Int. KB & T/P

PCMCIA type II

4 IN 1 Card Reader •MMC •SD •MS •MS-Pro

Napa Diagram- W5F Sample •

CPU

GMCH Core Frequency 400MHz 12.1” Wide active matrix TFT, 1280x768resolution, • Support EDID

•

LCD Con.& Inverter

CRT

Yonah

•

Intel Yonah dual core • T2300/2400/2500/2600 1.66/ 1.83/ 2.0/ 2.16G Processor • 2MB On-Die L2 Cache

•

•667 MHz FSB

•LVDS

•DDR2 SDRAM 533/667 MHz •Single or Dual Channel support

•D-Sub 15 pin TV

•S-Video

Bluetooth V2.0

CMOS Module 1.3 mega pixels

Calistoga (GMCH) 945GM

USB 2.0 X3

•DMI Link ,100MHz (Direct Media Interface)

•IDE BUS ,Ultra ATA 100/66

•PCI BUS 3.3V ,33MHz ICH7-M

•Azalia Link

Audio CODEC ALC660

•2.5” 60/80/100/120 GB •4200/5400RPM

NEW CARD

•PCIE-E

MINI CARD 802.11 a/b/g Intel 3945 ABG

KBC M38857

•LPC BUS ,33MHz SPDIF or Line out FWH SST 49LF004A

TPM 1.2

•1 x SODIMM socket for expansion up to 1GB DDR2-533/667 DRAM support

Memory DIMM

•USB 2.0

•Combo drive •Super multi drive

•On board 512M DDR2 SDRAM 533/667 MHz design

Int. KB & T/P

Int. SPK

Int. & Ext. MIC

Modem Module

LAN 控制ler RTL 8101

Cardbus R5C832

IEEE 1394

5 IN 1 Card Reader

•MMC •SD •MS •MS-Pro •XD

RJ-45

Santa Rosa Diagram – A8Se Sample

Montevina Diagram –N80V Sample

Calpella Diagram –G60J Sample

Huron River结构图 Diagram –N53SV Sample Calpella –G60J Sample

AMD Platform

AMD Notebook Platform

AMD Notebook Chipsets

AMD Business Class

AMD Business Class

Among Danube platform system, chip group adopt three chip structural design, monobasic M880G (RS880M) at north bridge chip continue to use still ,But the chip of south bridge is upgraded from SB710 to SB820 M, the north bridge combines Mobility Radeon HD 4200 figure core, obility Radeon HD 5000 series to do for the independent display card and its matching. Besides supporting DDR3 SO-DIMM memory, AMD Danube platform also supports SATA 6Gbps high-speed interface, DVI/HDMI/DisplayPort video to expand interfaces, and the generator of the integrated clock and a new generation's wireless technology.

AMD Client Processor Roadmap

AMD Puma Diagram–N50Tr Sample

AMD Tigris Diagram–K40AF Sample

AMD Danube Diagram –K42DR Sample

AMD CPU S1g4

AMD CPU S1g4

 S1g4 processor support all S1g3 processor features.

Eeepc Platform

所屬平台

Diamondville

Diamondville

PineTrail

PineTrail 處理器型號 Atom N270 Atom N280 Atom N450 Atom D410 Atom D450 運行頻率

1.66GHZ

1.66GHZ

1.66GHZ

1.66GHZ

1.66GHZ

1/2

1/2

1/2

1/2

2/4

533MHZ

667MHZ

667MHZ

800MHZ

800MHZ

L2

512KB

512KB

512KB

512KB

2*512KB

製程

45nm

45nm

45nm

45nm

45nm

TDP功耗

2.5W

2.5W

5.5W

10W

13W

核心數 FSB

2

1 3

1 2

Socket A Athlon XP

Chapter 2 POWER Repair Guide

Overview  Introduction  Diagram  Repair Flow Chart  Q & A (Repair Experience)

Introduction  Classification of the power circuit  Linear & Switching Regulator  Switching Buck Converter  Voltage & Current Mode Control  Multiple Output Controller  Multi-Phase Operation

Power Classification Type  ACDC: Rectification.  DCDC: DC Converter.

 DCAC: Inverter.  ACAC: AC Converter.

@ DC Converter  Linear & Switch @ IC in Power circuit, generally call “Regulator”

Linear Regulator INPUT

OUTPUT REF - +

• Linear Regulator – Advantages • Simple • Low Cost

– Issues • Power Dissipation

Switching Regulator

• Switching Regulator – Advantages • Efficient

– Issues • Noise • Layout

The Basics of Switching Regulator

Switching Buck Converter Synchronous Buck Converter is More Efficient VCC

VCC VIN

UGATE PHASE

PWM controller FB

GND

VIN

VOUT

PWM controller FB

UGATE PHASE

VOUT

LGATE PGND

GND

ST和ARD BUCK CONVERTER

SYNCHRONOUS BUCK CONVERTER

Voltage Mode vs. Current Mode Control CONTROL IC PWM LOGIC

VIN

CONTROL IC VOUT

VOLTAGE CONTROL

PWM LOGIC

VIN

VOUT

CURRENT CONTROL VOLTAGE CONTROL

• Voltage Mode control Single control Loop – No Current Sense Resistor – Better Noise Immunity – Less Sensitive to Layout

• Current Mode control Immediate Response to change s in Input Voltage – Inherent Current Limiting

Diagram  Santa Rosa Power Plane Standard Diagram (A8S,A8E,F3E,F7Sr,F9S,W7S,Z96S…..etc.)

 Montevina Power Plane Standard Diagram (F6V,N80Vc,N80Vr,M51Va,N20A…..etc.)

 Calpella Power Plane Standard Diagram (N71JA………………………………….etc)

 Sandy Bridge Puma Power Plane Standard Diagram (N53SV………………………………….etc)

 AMD Puma Power Plane Standard Diagram (N61DA…………………………………etc)

 Diamondville Power Plane Standard Diagram (1008HA…………………………………etc)

 PineTrail Power Plane Standard Diagram (1201HA…………………………….…..etc.)

 ATOM+ MCP79 Power Plane Standard Diagram (1201N…………………………………etc)

 Eeepc AMD CPU Power Plane Standard Diagram (1201T…………………………….…..etc.)

Diagram-1

(Santa Rosa )

Diagram-2-1

(Montevina)

Diagram-2-2

(Montevina)

Diagram-3

(Calpella)

Diagram-4

(Sandy Bridge)

Diagram-5

(AMD Puma)

Diagram-6

(Diamondville Puma)

Diagram-7

(PineTrail Puma)

Repair Flow Chart(1) Start Confirm the symptom problem is Power to GND or No Power Trace the circuit, V.I Check & change NG related Component Change NG CMOS BATT & X‟tal Component /trace related circuit Trace related circuit, Change Defect Component

Change NG Component

Trace related component, compare with the circuit Change NG Component

Finished

No Power / Power On error

Measure AC_BAT_SYS signal (AC mode : 19V,BATT mode 16.8V)

Visual Inspection A/D & BATT Connector/Measure voltage

COMS Voltage between 3V~3.3V X‟tal CLK signal is correct 32.768kHz

Measure COMS battery/ X‟tal CLK for S.B is OK ?

Confirm the circuit, Check All Always/ Stand-by Voltage (ex. +3V/+5V always) (by RD design)

Trace and confirm the circuit to Check 1.PWR_SW# status Hi->Lo->Hi and Lid_SW# signal must be always Hi 2.PWR_BTN# signal status Lo->Hi->Lo (to S.B) (all status Hi or Lo will be by RD Design spec.) 1.PM_SUSC# +3V , +5V +12V ………etc (by model request) 2.PM_SUSB# +12Vs , +3Vs , +5Vs…..etc (by model request) 3.CPUVR_ON Vcore , VRM_PWRGD , CLK_EN#

Check Always/ stand-by Voltage is OK ?

Check PWR_SW# & PWR_BTN# circuit is OK

Measure & Check Control Signal PM_SUSC# / PM_SUSB# / PM_SUSA# /CPUVR_ON

Repair Flow Chart(2) Start Confirm the symptom problem is Power to GND or No Power

Power GND

Visual Inspection All Component is OK ? ICT jump Power Voltage GND

Confirm the problem

Check component have short or burn

AC_BAT_SYS Signal GND

Confirm & check to separate which power circuit cause AC_BAT_SYS to GND

Confirm the TSICT program, Check what kind voltage of ICT Power jump (+3V or +3Vs / +5V or +5Vs ….)

Power circuit can differentiate to 4 section : (一)Main Power IC circuit Check MOS-FET ,Capacitor ,Power IC (二)BATT charge circuit Check MOS-FET ,Capacitor ,Diode ,Charge IC (三)CPU Vcore Power circuit Check MOS-FET ,Capacitor ,Diode ,CPU power IC (四)LCD Inverter Power supply circuit Check Capacitor or Inductance

(一)Separate

ICT power Jump solder, Use multi-Meter to measure which side voltage to GND (二)Confirm the circuit and use TSICT program to Find out all the connection component Check Item as follow: (1)Check MOS-FET component (G-S gate is no short) (2)Check Capacitor (V.I capacitor surface is no rift) (3)Change voltage to GND of BGA component Finish

NB power training --For Montevina platform

An important component platform needed---EC

       

Keyboard matrix/Touchpad control Power/Charger…LEDs instruct Fan tachometer control Power management (sleep/hibernate/wake up/Lid switch) Power sequence control with ICH9M Battery charger/cell capacity/temperature monitor GPIO control ………… PS: If the system cann‟t power on, we can snatch LPC_FRAME# to make known that whether EC has worked.

ACPI (Advanced Configuration and Power Interface, advanced configuration and power interface) It is by Intel, Unless Microsoft, Phoenix, HP and computer powers that Toshiba make together last specification, it last operating system can Utilize the state of power with various devices of direct management.

Power Sequence Provision---ACPI Power State

 G0/S0:Full on  G1/S1:CPU sleep ----SB(EXP:ICH9M) has the option to assert the CPUSLP# signal to further reduce processor power consumption.  G1/S3:Suspend to RAM ----The system context is maintained in system DRAM, but power is shut off to non-critical circuits. Memory is retained, and refreshes continue. All clocks stop except RTC clock.  G1/S4:Suspend to Disk ----The context of the system is maintained on the disk. All power is then shut off to the system except for the logic required to resume.

 G2/S5:Soft off ----System context is not maintained. All power is shut off except for the logic required to restart. A full boot is required when waking.  G3:Mechanical off ----power failure Because the system does not have any power.

Power Sequence types on notebook  Five types of power sequence  G3S5  S5S0 (Power on)  S0S5 (Power down)  S3S0  S0S3

Power on---AC/DC block flow START

Difference:  AC mode (plug in adaptor): G3S4/S5 , have VSUS power. (to save power)  DC mode (only plug in battery): G3S4/S5 , have no VSUS power.

0 0

Wait VSUS_GD=1

1 PM_PWRBTN# -> 1 Delay 20ms PM_RSMRST# -> 1

end

1

1 VSUS_ON -> 0 PM_RSMRST# -> 0

VSUS_ON -> 1 Delay 5ms

0

VSUS_ON

AC_IN#

end

end

Power on---AC NB Cantiga

2.A/D_DOCK_I N

16.VRM_PWRGD

SB ICH9M

4.AC_OK=1

16.VRM_PWRGD

EC ITE8752

12.PM_SUSB#

11.PM_SUSC#

10.PWRBTN#

8.PM_RSMRST#

1.RTCRST#

9.PWR_SW #

Vcore controller

5.VSUS_O N

RT8203

17.PM_PWROK

RTC BAT

MAX8725 3.AC_BAT_SYS

19.PLT_RST#

CPU

20.H_CPU_RST#

sequence

7.VSUS_G D 13.SUSC_O N 14.SUSB_ON 15.CPU_VRON (55ms)

MEMORY POWER(+1.8V,0.9V) OTHER MAIN POWER(+1.5V,+1.05V etc.)

4.+3V A

Power on---DC NB Cantiga

2.BAT_CON

16.VRM_PWRGD

SB ICH9M

EC ITE8752 16.VRM_PWRGD

12.PM_SUSB#

11.PM_SUSC#

10.PWRBTN#

9.PM_RSMRST#

1.RTCRST#

5.PWR_SW # 4.AC_OK=0

Vcore controller

6.VSUS_O N

RT8203

17.PM_PWROK

RTC BAT

MAX8725 3.AC_BAT_SYS

19.PLT_RST#

CPU

20.H_CPU_RST#

sequence

8.VSUS_G D 13.SUSC_O N 14.SUSB_ON 15.CPU_VRON (55ms)

MEMORY POWER(+1.8V,0.9V) OTHER MAIN POWER(+1.5V,+1.05V etc.)

4.+3V A

F3Q Power on Sequence(1)

F3Q Power on Sequence(2)

F3Q Power on Sequence(3)

F3Q Power on Sequence(4)

F3Q Power on Sequence(5)

Power down---Block flow  Block flow

Power down---General Sequence

Common Bugs(1)  1.The system cann‟t be powered on, and the adaptor LED indication flicker. Here is somewhere short, check all power rails whether have been short to GND.

 2.The system cann‟t be powered on, and power LED not lighten. Maybe The BIOS ROM content has been wrecked. +3VA powered? Why not VSUS power? Power IC or MOSFET or Diode burnout?

 3.The power LED lighten, but the system cann‟t bring up to DOS. plug in debug card, view the 80 post code, for example: 80 code no motion, show 00 –> CPU not work –>measure power sequence black screen, show d0~d5 –> memory plug failed or memory broken black screen, show F0~F2 –> one DIMM slot failed show 38 –> check USB port and USB device

If not mount LPC debug & Newcard debug card because of cost down, try to flash BIOS by JIG board or measure sequence.

Common Bugs(2)

 4.The system ofen show blue screen suddenly in OS un-install drives (even enter safe mode), find whether a device driver installed wrongly cause it un-plug device to check BIOS updated? Care for BIOS release note check FAN status/thermal module –> over temperature? and so on……

 5.take a software bug on M51A for example in Vista, can use hotkeys Fn+F5 & Fn+F6 to control backlight brightness, but in XP, these hotkeys have no function Vista: report to driver directly to active； but XP: need report to BIOS, and it send software SCI to active. solution: update BIOS to 217 or newer version

NB power training --For calpella platform

Outline Charger –MB39A132 1.Adapter/battery exchange 2.Chang to prepare 3.MB39A132 charging’s Establishment 4.MAX8725 charging’s Establishment 5.MAX17015 charging’s Establishment

Vcore –RT8856 1.Montevina platform VS Calpella (power) 2.VID’s Establishment setp 3.Powet sequence

GFX Core –RT8152 1.RT8152 intorduse 2. Power sequence

System –RT8206/RT8202 1.RT8206 2.RT8202

Power-flow

二、Vcore –RT8856 1、 Montevina platform VS Calpella (power) Item

Montevina (IMVP6+)

Calpella (IMVP6.5)

chipsets

3个(CPU+NB+SB)

2个(CPU+Ibex Peak-M)

power

Vcore(core)

VGFX (Graphics)/ Vcore (core) /VTT-CPU(core)

Memory Support

DDR2(1.8V)

DDR3(1.5V)

DAC codes

VID[6:0]

VID[6:0]

Vboot

1.2V

1.1V

Monitor

PMON

IMON

DPRSLPVR

3.3V-H

Vttcpu-H

DPRSTP#

Support slow C4

deleted

Performance

Performance

/X

Turbo boost

other

OVP

1.7V

1.55V

Power rail

VID/ Vboot

Power saving signal

2、VID’s Establishment

POC (power on configuration) line: Vcore power pull high before，CPU will pass VID[5:3] step to know VR Imax; VID[2:0],VID[6],DPRSLPVR,PSI #---default; CPU will passVR .IMON will know Vcore and GFX-core’spower; Turbo Boost Technology: CPU Core and GFX Core make power sharing， improve thrt performance

3、Power sequence

Wait system power OK after，EC will pull CPU_VRON to High，Vcore power than to up，VRM_PWRGD pull high after 6ms..

三、GFX Core –RT8152 1、RT8152 intorduce

GFX core no need to Establishment POC line，VID pull H/L only for factory ATS test(No put in CPU,VID floating)，DPRSLPVR no need to Establishment default; CPU pass VR的IMON to know GFX-core‟spower; Turbo Boost Technology

2、Power sequence

GFX Core power between VTT_CPU power after ，Vcore power befer， CPU Send GFX_VRON news ，power level is CTT_CPU

四、system –RT8206/RT8202 1、RT8206

RT8206‟s work principle the same RT8205 +3VA open by +5VA than pass LDO to output.

2、RT8202: two type EN =High, RT8202 will follow loading to reduce PWM operating frequency , raise the efficiency

EN=floating,RT8202 of Fixed frequency ，Freq=500KHz

Q&A Q1:MAX8725, MAX17015 charge the principle. Leave ADAPTER show battery icon, leave the battery show ADAPTER icon, except consider AC _ IN _ OC# and BAT _ IN _OC# What signals does need considering? A: first need check adapter and battery are OK or not =>And then see AC _ IN _ OC # and BAT _ IN _ OC#(TS1#) Connect it by mistake =>Confirm whether EC is OK

Q2：Q2: RT8206 operation principle，K40C use this chip，a lot of 3vo and 5vo are loss,so don‟t boot A：Want this pieces of question according to at check forward step by step: Confirm first whether the board or component are damaged =>After having the power, AC_BAT_ SYSwhether the voltage =>Is 5VA OK =>Is 3VA OK =>VSUS_ON stand up =>If no 3VO/5VO voltage, should be change controller .

N

AC_BAT_SYS

Device short to GND

Y +3VA

N

PWR Control IC Damage

Y

SUS

N

Repair Flow Chart

Y

PWR Control IC /MOS Damage

VSUS_ON

N

EC Damage

Y SUSC

N

Y SUSC_EC#

IC/MOS Damage

Y SUSB

Y

N

SUSC_EC#

IC/MOS Damage

Y CPU

N

Y CPU_VRON

IC/MOS Damage

EX1: Adapter indicator lamp to glimmers ceaselessly AC indicator lamp to glimmers ceaselessly

AC_BAT_SYS

Battery

PWR short to GND Device short to GND

NB,SB to GND

N Device short to GND

EX2： NO +3VSUS,+5VSUS voltage AC

N +3VA

Remove +3VAO-> +3VA JP

Y VSUS_ON

Y

Y IC Damage

+3VA Y

N

measure MOS OK?

N

N Change MOS

EC Damage

RT8206 Damage

1.Remove PWR to Device of JP

二.Link JP of below

AC in

Adapter indicator lamp to glimmers N ceaselessly

Device short to GND

Y

N

PWR short to GND

measure Power rail H-s& L-s MOS

Exchang damage H-s& L-s MOS

Link +3VAO-> +3VA JP

Join sequentially of other JP N Chang PWR IC

Y

EC short to GND

EX3： NB don‟t charge Battery is it intact

VSET_EC ISET_EC have or not?

N

EC Damage

Y N MOS ok or no?t Y Change IC

Change MOS

EX4： No VCORE voltage Other power Ok?

N

EC Damage

CPU_VRON

Y Measure MOS OK?

Y IC Damage

N 更換MOS

NB power training --For Sandy Bridge platform

N53SV Power Sequence

NB power training --For AMD platform

N61DA use RX881 replacement RS880

N61DA use clock gen by SB inside.

S5S0



S3S0

Problems 1.The system cann‟t be powered on, and the adaptor LED indication flicker. Here is somewhere short, check all power rails whether have been short to GND.

2.The system cann‟t be powered on, and power LED not lighten. Maybe The BIOS ROM content has been wrecked. +3VA powered? Why not VSUS power? Power IC or MOSFET or Diode burnout?

3.The power LED lighten, but the system cann‟t bring up to DOS. plug in debug card, view the 80 post code, for example: 80 code no motion, show 00 –> CPU not work –>measure power sequence black screen, show d0~d5 –> memory plug failed or memory broken black screen, show F0~F2 –> one DIMM slot failed

If not mount LPC debug because of cost down, try to Newcard port, flash BIOS by JIG board or measure sequence.

4.The system often show blue screen suddenly in OS un-install drives (even enter safe mode), find whether a device driver installed wrongly cause it un-plug device to check BIOS updated? Care for BIOS release note check FAN status/thermal module –> over temperature? and so on……

Problems When normal voltage and frequency are still not open where do you begin. Disconnect all Device, re-plug DIMM, flash EEPROM,, confirm all reset nets, check Debug code Blue screen, crashes, can‟t into the system, where do you begin。 Disconnect all Device, re-plug DIMM, flash EEPROM, replace the HDD, check the FAN & Thermal module, search Windows error code Keyboard string key, for the EC and keyboard interface, keyboard interface to ground resistance is normal, what issues need to be considered. Replace the keyboard, re-weld, check the EMI capacitor

Problems

E-SATA device can‟t recognize Check cable is connected or not

WLAN can‟t open Check WLAN switch is connected or not

Start soon shot down for no reason Check thermal pip & fan is not connected correctly.

Problems Boot no display, but the debug card can run code Check LVDS cable is not connected Check LVDS cable is bad

NB power training --For EeePC(1008HA) platform

5 types of Power sequence G3S5 S5S0(Power on) S0S5(Power off) S3S0 S0S3

Power states on 1008HA States

Mode

VA

VSUS_ON

VSUS

SUSC#

1.8V & VTT_DDR

SUSB#

VS

ADP

off

low

off

low

off

low

off

BAT

off

low

off

low

off

low

off

ADP

on

high

on

low

off

low

off

BAT

off

low

off

low

off

low

off

ADP

on

high

on

high

on

low

off

BAT

on

high

on

high

on

low

off

ADP

on

high

on

high

on

high

on

BAT

on

high

on

high

on

high

on

G3

S5/S4

S3

S0

EC firmware make this different Power latch make this different

Power on sequence

Sym

Timing Parameters

Min

Ta

Vcc/Vccp assertion to VID valid

10

us

Tb

VID/BSEL valid to Vcc stable

100

us

10

us

Tc

Vccp stable to VID/BSEL valid

Max

Unit

Td

PWRGOOD assertion to RESET# deassertion time

1

10

ms

Te

VCC,BOOT stable to PWRGOOD assertion

0.05

20

ms

Tf

BCLK stable to PWRGOOD assertion

10

BCLKs

Tg

VCCA stable to PWRGOOD assertion

1

ms

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Q&A Appendix

Debug flow No ADP in

On

ADP LED flickering

Check +3VA Of f Open the short pin between +3VA & +3VAO

yes There is somewhere short Check VA SUS power

Of Check RT8205D circuit f

Check Charger circuit AD_DOCK_IN, AC_BAT_SYS

Press power bottom

Power LED on

Of f Check VSUS_ON On

On

Of On f Check RT8205D circuit

EC/SPI ROM Damage

1008HA can change power board

Of f

Refresh Bios

Unplug Devices & Check device

Check Drivers & AP Or is there any virus? Not solve

OK

Check PM_RSMRST# , PM_PWRBTN#, SUSB# & SUSC#

Use OEM Image No

OK Update latest Bios

OK Check Bios menu SATA IDE/AHCI mode (default AHCI) Check HDD

No System stable

Low

Refresh Bios or Change EC chip

High

High

Check main power Check power voltage CLK frequency

00 Check debug code

No yes

yes

Low

Check SUSB_ON & SUSC_ON

Ok

Solve

Check PLT_RST#

Ok Boot in OS

d5 Check memory module

EC EOS Issue Symptom: 1. PWR LED doesn’t light while pressing power bottom 2. VSUS power aren’t ready (VSUS_ON isn’t High) 3. Refresh Bios doesn’t work 4. There is some evident damage on EC chip

Root cause: 1. FFC cable plug/unplug when the system is not in G3 states (Mechanical OFF) 2. FFC cable doesn't plug well and the system is not in G3 states (AC or Battery plug in)

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Appendix

Outline Block Diagram Features Power on sequence Common bug analyze on 1008HA Q&A Appendix

Definition of each states

NB power training --For EeePC(1201HA) platform

Agenda • Power Solution Introduction • Common Bug Criteria and Solution

Power Solution

Power State & Signal Control

Power flow Power Schematic

1.Power State & Signal Control

Always Power

Standby Power

Dual Power

Power Rail

EX:3VA,5VA

EX:3VSUS,5VSUS

EX:1.8V

EX:3VS,5VS

EX:VCCP

Control

/X (*)

VSUS_ON

SUSC_ON

SUSB_ON

CPU_VRON

(*):Because of the power latch circuit, there‟s no always power when only insert battery.

Main Power

2.Power flow EMB24B03G (SWITCH) AC_APR_UC_10 A/D_DOCK_IN

MB39A132 (Controllor)

AC_BAT_SYS

BAT CHG_ACOK#_10

AC_BAT_SYS

RT8205CGQW (Controller) 3VSUS: Hi-side: EMB20N03V Low-side: EMB20N03V 5VSUS: Hi-side:EMB20N03V Low-side:RJK0355

(under0.45A) +5VA

UP7714 (LDO)

+3VA

SUSB_ON +5VSUS (3A)

VSUS_ON SUSC_ON SUSB_ON VSUS_ON

CHARGER

EMB20P03G SWITCH

+3VSUS (4A) SUSC_ON

(0.1A)

EMB20N03V (SWITCH)

+5VS (1.5A)

EMB20N03V (SWITCH)

+5V

EMB20N03V (SWITCH)

+3VS

EMB20N03V (SWITCH)

+3V

(1.5A) (2.5A)

UP7714 (LDO)

+2.5VS (150mA)

(1.5A)

SUSC_ON RT8202APQW (Controller)

+1.8V (3A)

UP7711 (LDO)

1.8V: Hi-side:EMB20N03V Low-side: EMB20N03V

VTT_DDR (0.5A)

UP7704 (LDO) RT8202APQW (Controller) CPU_VRON

VCCP: Hi-side: EMB20N03V Low-side: EMB20N03V

+VCCP(5.5A)

EMB20N03V (MOS)

+1.5VS (1A)

+VCCP_C6 (2A)

SLPIOVR# RT8202APQW (Controller) VCCP_PWRGD

VCORE: Hi-side: EMB20N03V Low-side: EMB20N03V

+VCORE

(4A)

VRM_PWRGD

SYSTEM

3.Power Schematic • Load Switch

• Linear circuit • Switching circuit

• Charger circuit • Power Latch circuit

a) Load switch

+12VSUS

+3VSUS

PQ28 EMB20N03V 8 7 6 S 5 5D G

Shape

1 2 3 4

Shape

+3VS (1.5A)

1

1

+5VA

When EN is high, the mosfet turn on

PR116 62KOhm 1%

PT 23

1

PT 27

2

1 1

2

PC111 0.01UF/16V GND

2

1 00 KOhm PRN5 9A

+3VS,+5VS EN

1 00 KOhm 3 PRN5 9B

1

P_3VS5VS_EN_10

PC110 1UF/16V

1 PT 28

4

1

UM6K1N

+5VSUS

Shape

PRN59D 5

UM6K1N

2

S0

GND

S5

S3/S5

PR117

4

PC113 0.01UF/16V /X

1 GND

GND

2 10KOhm

1

8 10mil 100KOhm 1

7

PQ30B

PC114 0.01UF/16V

GND

+ PCE6

PC112 1UF/16V

2

10mil

32,37,45,46,50 SUSB_ON

+5VS 1

2

PT 24

(1.5A)

Shape

100UF/6.3V /X

2

PQ30A

1 2 3 4

1

PQ29 EMB20N03V 8 7 6 S 5 5D G

1

5 100KOhm

2

PRN59C 6

6

3P_SUSB# _ON_ 10 2

GND

GND

GND

1

PL17 2 70Ohm /100Mhz

+5V_USB

b) Linear circuit VTT_DDR / 0.5A 2

+1.8V

9 8 7 6 5

1 5mil

UP 77 11 U8

P U7B P R13 9 1 0K Ohm

10 11 12 13

GND

1

P C87 P C86 0 .1 UF/16 V 0 .1 UF/16 V

2

GND

GND3 GND4 GND5 GND6 UP 77 11 U8

P _V T T DDR_RE F_ 10

2

GND

GND2 NC3 NC2 V CNT L NC1

P C85 GND 1 0UF/6 .3 V

1 0UF/6 .3 V

2

GND

V IN GND1 RE FIN V OUT

2

1

1

1 2

1 0UF/6 .3 V

P C84

1 2 3 4

1

2 5mil

+VT T _ DDR P C83

P U7A

7 0Ohm /1 00 Mhz

1

P T 35

+1.8V

1

1

+5V S P L1 4

P R14 0 1 0K Ohm

2

P T 36

1

1

GND

GND

+3V S _V DA C_CH

1

+3V S _V DA C_CH

2

GND

+2.5VS / 150mA

GND

2

P R10 7 0 Oh m

1

4

+2.5V S P R10 9 1 0K Ohm 1%

S HORT_ P IN /X P C10 3

1

P U9 UP 77 14 B MA5 -00

5

1 1 0UF/6 .3 V

2

2

2

2

1 UF/16 V

P C10 2 1 UF/16 V /X

E N NC/SS /FB GND V IN V OUT

1

1

P C10 1

1

P _2 .5V S _S HDN#_ 10 1 2 3

P R10 8 P JP 2 0 2 2K Ohm 1 % P _2 .5V S _FB _110 2P _2 .5V S _FB JP2_ 10

GND

GND GND

GND

1

P T 32 P T 31

+3VA_AEC / 100mA +5V A

+5V A

2

P T 22 T P C26 T /X

1

P R30 1 00 KOh m

P C25 2

P T 11 T P C26 T

2 20 PF/50 V /X1

/X

P C28 0 .1 UF/16 V

1

+3V A 4

S HORT_ P IN

UP 77 14 B MA5 -00

1

1

1

P R34 1 0K Ohm

P C29 1 0UF/6 .3 V

2

2

P C27 1 UF/16 V

5

E N NC/SS /FB GND V IN V OUT

1

1

P U2

P _3 V A -E C_ E N_ 10 1 2 3

P R32 1 % 3 1.6K Oh m P JP 7 /X P _3 V A -E C_ FB _210 1P _3 V A -E C_ FB J P_ 10 2 1

2

c 06 03

2

c 08 05 _h 57

GND

GND

GND GND +1.8V

+1.5VS / 1A +5V S

8 .6 6K Oh m

1 0UF/6 .3 V

3

P Q27 2 N7 00 2

D

P R11 5 1P _+1.5 V S_ OV _1 011 P C12 7 0 .1 UF/16 V /X

GND

2 S

2

G 1 00 KOh m

1

2

2

1 4,43 ,44 ,4 5 P M_L E V EL DOWN#

1

2

1

1 0UF/6 .3 V

2

P C10 7

GND

GND

GND

P _1 .5V S _OV # _1 0

GND

P C10 6

1

1

+1.5V S S HORT_ P IN /X

2

GND

P R11 3

1

2

2 GND

P _1 .5V S _CNT LUP _1 077 06 U8 mb _s oi c _8 p_ 19 7x2 36 _4 vi aP R11 4 5 1K Ohm P C10 8 1% 0 .1 UF/16 V /X

3

P C10 5

1 0UF/6 .3 V

P JP 2 1 2

1

P C10 4 0 .1 UF/16 V /X

2

1 MOHM

GND 9 P R11 1 8 6 .3 4K Oh m 7 P _1 .5V S _FB _1 0 2 1P _1 .5V S _FB JP _ 10 6 5

2

P R11 2

P OK EN V IN CNT L

GND2 GND1 FB V OUT NC

1

1

1

3 2,37 ,45 ,4 8,5 0 S US B _ON

1 2 3 4

1

P U12 A P R11 0 1 0K Ohm 2 1 P _1 .5V S _E N_ 10 P _1 .5V S _V IN_S

1

1

2

P T 40

GND

P T 30 P T 29

Common IC in linear circuit：

The greater voltage drop on MOS, the smaller current allowed

1201HA use UP7711 for VTT_DDR, UP7704 for 1.5VS, and UP7714 for +3VA and +2.5VS. Action Principle: Amplified signal controls MOS GATE voltage, furthermore, MOS turn-on resistance is adjusted to change voltage drop on MOS, so output is adjusted too.

UP7714 IC internal structure Variable resistor

c) Switching circuit PR93

+5VS

1

PL12 P_VCCP_IN_S

P_VCCP_BST _15

1 2

1 G 2

4 3 2 1

1Oh m

P_VCCP_LG_2 0 GND

PC159 PC160 22UF/6.3V 22UF/6.3V 2

SHORT _PIN /X

402KOh m

GND

GND

GND

GND 2

1

P_VCCP_FBJP_10 1

1

PR101 2.74KOhm 1%

PR102 10KOhm 1%

PC98

PU8B 18 20

2

0.1UF/16V

GND3 GND4 GND5 GND6

19 21

RT 8202APQW GND 1 1 1%

S0

6

PQ26 A

PR104 2

1

1

1

UM6K1N

PC99 0.1UF/16V

GND 2

100KOh m

PM_LEVE LDOWN# 14,43,44,46

S3/S5

S3/S5

Hi : Vout = 1.0497V

+5VA

3

Low : Vout = 0.965V

2

2

GND

PD18 BAT 54CW /X 1

1

15KOhm

GND

PR149 100KOh m

P_VCCP_EN_10 6

PR105 2 PR144

1

2

100KOh m PC100 0.1UF/16V Defaul t

14

PR145 32,42 CPU_VRON

2 0Oh m

GND

UM6K1N

PQ62 0B 1

P_VCCP_ENF_10 5

PC173 0.1UF/16V /X

2

2

1

UM6K1N

+VCCP_OV 0

PQ62 0A 2 1

PR106 5

1 0Oh m /X

3

PQ26 B

2

2

32,37,46,48,50 SUSB_ON

GND GND

UM6K1N 4

30KOHM 3

1

4

GND

PT 37

1

2

PR103 2

GND

GND

1

1

PC158 22UF/6.3V PJP19

PR99 PR100

1

+VCCP

2

PC93 1000PF/50V c0603

1

5 6 7 8

2

Ilimit = Rilim / Rsense * 20u

GND

1000PF/50V 1

PT 21

2 2.2UH

2

PJP18 SHORT _PIN /X

1

2

P_VCCP_PHASE_S 1

2

4 3 2 1

GND2 TON EN/DEM NC2 BOOT

PC95 1UF/16V RT 8202APQW

PT 20

1 PL13

1 P_VCCP_SNU_S 2 1

PR98 10KOhm 1%

1

PQ24 EMB20N03V

5

P_VCCP_PHASE_20 1 P_VCCP_OCR_102

2

GND

PC97 2

+VCCP / 5.5A

GND

S

GND

P_VCCP_FB_ 10

2

2

1UF/16V

3P_VCCP_BST _15 2

1

PC94

GND PC92 0.1UF/25V 2 1

8 7 6 5 D

PC96 0.1UF/16V /X

BAT 54CW

PQ2 5 EMB2 0N0 3V

1

1

7,42 VCCP_PWRGD

PD14 1

12 UGA TE 11 PHASE 10 OC 9 VDDP

NC1 GND1 PGND L GATE

1 2

+VCCP 1 P_VCCP_VDD_10 2 VOUT P_VCCP_FB_10 3 VDD P_VCCP_PW RGD_10 4 FB PGOOD

PC126 10UF/25V c1206_h75

G

100KOh m

AC_BAT _SYS

S

PU8A

17 16 15 14 13

P_VCCP_UG_ 20 GND

PR96

PC90 10UF/25V c1206_h75

5

PR95 820KOh m 1

2

P_VCCP_IN_S 2

+5VS

2

8 7 6 5 D

+3VS

1

70Ohm /100Mhz

P_VCCP_TON_1 0 P_VCCP_EN_1 0

0Oh m /X

P_VCCP_FB_ 1 10

P_VCCP_ENF_10 2

EN

The basic principle of DC-DC switching circuit is to regulate the output voltage value by controlling the duty cycle.

Vout=Ton/(Ton+Toff)*Vin Duty cycle=Vout/Vin Ton：H-S Turn-on time Toff：L-S Turn-on time

Vdriver+Vboot

Toff

UGATE: Ton

Vdriver

LGATE: Vin Switching‟s advantages compared to Linear： 1.Output voltage can be lower 2. High conversion efficiency

PHASE:

e) Power Latch +3V_P L 2

20 mil

1 P R12 9 33 0K OHM

RT8205CGQW EN

+VCC_ RTC P _+3V A _ +5 V A_ E N_1 04 3

/X

6

P R13 1 0 Oh m /X

P RN61 A 1 00 KOh m

P R13 2 0 Oh m

2 9,32 P W R_ S W_ E C#

P D15 1

GND

3

3 2

1

P C12 3 0 .1 UF/16 V /X

B A T 54 A W

2

P D16 B A T 54 A W 29

EC

1 2

P W R_ S W#

3

2

1

4 3,47 P _CHG_ ACOK # _1 0

1

3 GND

+3VA

P Q37 A UM6K 1 N

2

2

P RN61 B 1 00 KOh m

1

2

3

4

P R13 0 20 0K Oh m

+3V _P L

+3V A

1

1

P U11 A P L4 31 LB A C

10 UF/6 .3 V

2

P_ 3VPL _FB_ 10

For Power Latch

1

2

10 K Ohm

PC1 22 2 1

1

+3 V _P L

2

P R12 8 A C_B A T _S Y S

When insert battery only,+3VA_PL is high,3VA & 5VA will be latched low.

P Q37 B UM6K 1 N

P S -ON 6

3 5 HOT K EY _ S W0 #_ P

2

1 1 00 KOh m/X

3

P Q38 A UM6K 1 N /X 2

P Q38 B UM6K 1 N /X 5

1

1 UF/25 V /X

P R13 3

4

P C12 4 2 1

1

A /D_DOCK _IN

6

GND

1

When push the power button, or insert adaptor, 3VA & 5VA will exist

P R13 5 3 90 KOh m /X

2

2

This circuit is used for power saving.

GND

GND

5 1 00 KOh m

P RN61 D 8 1 00 KOh m7 BAT GND P R13 4 2

1 1 00 KOh m/X

P R13 6 5 10 KOh m /X GND

P S -ON

P RN61 C

4

GND

Latch 5

P C12 5 2 1 0 .2 2UF/2 5V/X

32

Common Bug Criteria and Solution • • • • •

Switching Circuit Debug Flow How to make an estimation initially？ How to determine whether MOS is burned？ How to determine whether IC is normal？ LDO circuit debug

1.Switching Circuit Debug Flow MOS Visual Inspection

Inductor，Resister IC and components around

Static Measurement

Input/Output Resistance Confirmation MOS Resistance Confirmation Input/output voltage

Power on Test IC VCC，ENABLE voltage

2.How to make an estimation initially ？ Measure if MOS is short? Visual inspect whether MOS， Yes inductor，capacitor，IC has any burned symptom

Measure if capacitor is short? Measure if IC is damaged?

Yes Change damaged component

For the output： Measure Output Resistance short? Yes

Maybe L-S MOS is burned

Measure MOS to confirm

For the input： Maybe H-S MOS is burned Measure 19V input short?

Yes Maybe L-S MOS is burned Maybe input capacitor is burned

PS：All measurement above is static on board

Measure MOS Measure MOS Change capacitor

3.How to determine whether MOS is burned? Input/output short is commonly due to MOS short，if it is the case, please measure MOSFET first.

Onboard MOSFET in switching circuit criteria

For high side MOS 1.Measure the resistance between Drain and Source, which should be above 50ohm, if so, all high side MOS is considered OK. 2. Measure the resistance between Gate and Source, if it isn‟t above K magnitude, the MOSFET is considered bad.

For low side MOS 1. Measure the resistance between Drain and Source. If not short, all low side MOS is considered OK.

2. Measure the resistance between Gate and Source. If it isn‟t above K magnitude, the MOSFET is considered bad.

Attentions: 1.Please discharge the MOSFET before measurement (mustn‟t power on) : separately short G and S, G and D, D and S one time. (short G and S is necessary) 2.Measurement sequence: measure D,S or G,D first, G,S last

Summary： •

If MOS G-S, G-D resistance is above 1K ohm ,for high side MOS D-S above 50ohm or for low side MOS D-S not short, the MOSFET is OK.

•

Resistance measurement sequence: D-S, G-D, G-S

•

Able to use diode level(

1

) 2to measure voltage between S

and D, above 0.1V is OK. •

The MOS which removed should be confirmed burned or not.

•

If all MOS is changed OK, but output still short, maybe it‟s the problem of IC, or the load device (for Vcore or charger or any other without short pin).

VOUT VDD FB PGOOD

UGATE PHASE OC VDDP

12 11 10 9

RT8202APQW 5 6 7 8

Remove IC, measure the resistance between every pin of IC and GND (compare with good IC) b. Power on test：

1 2 3 4

GND2 TON EN/D EM NC2 BOOT

a. Static measurement (suggest step):

PU500

NC1 GND1 PGND LGATE

If there is no voltage after power on with all MOS OK, IC is likely damaged.

17 16 15 14 13

4.How to determine whether IC is OK？

1.Change good IC, check whether output is normal after power on again. 2.If abnormal, check whether the voltage of IC ENABLE and VCC pins is normal (can compare with a good one) . 3. When ENABLE is abnormal, disconnect timing control circuit, check timing control circuit after power on 4.When VCC is abnormal, measure whether the series connected resistors and VCC power rail are OK or not.

5.LDO circuit debug

P U2 1 2 3

E N NC/S S /FB GND V IN V OUT

5 4

UP 77 14 B MA 5 -00

•

LDO circuits include： +3VA,+VTT_DDR, +2.5VS,+1.5VS

•

Firstly, measure whether output resistance is short or not .

•

Then power on, measure each PIN voltage. Check whether input VIN, VCC, EN/SHDN# is normal to exclude timing problem. Also can check REFIN/SET/FB. Normally, correct REFIN/SET/FB voltage means IC is OK.

•

Last, change IC to exclude the problem of IC self.

EPC (1215T) Power

Agenda • Power Solution Introduction • Common Bug Criteria and Solution

Power Solution

Power State & Signal Control

Power flow Power Schematic

1.Power State & Signal Control

Always Power

Standby Power

Dual Power

Power Rail

EX:3VA,5VA

EX:3VSUS,5VSUS

EX:1.5V

EX:3VS,5VS

EX:VCCP VCORE

Control

/X (*)

VSUS_ON

SUSC_ON

SUSB_ON

CPU_VRON

(*):Because of the power latch circuit, there‟s no always power when only insert battery.

Main Power

2.Power flow BAT MB39A 132 H:FDM C8884 L:FDM C8884

EMB24 B03G

P_AC_ARP_UC_10

BAT

3S2P/ 12.6V/3A

AC_OK

AC_BAT_SYS

A/D_DOCK_IN

CHG_EN# S_SMBCLK1 S_SMBDATA1

Adaptor 40W(1 9V/2.1A)

SWITC H EMB20 P03

AC_BAT_SYS

RT8206*1/2

+3VSUS

H:F DMC8 884 CHG_EN#

VSUS_ON

+3VSUS (5A)

CHARGER

L:F DMC8 884

S_SMBCLK1

+3VS

(4.765A)

+3VA

(0.1A)

FDMC8 884 SUSB_ON

S_SMBDATA1

+5VA

APL53 25

+1.8VS (2.1A ) EC

MP224 9

SUSB_ON

VSUS_ON

RT8206*1/2 H:FDMC8884

SUSC_ON +5VSYS_EN

+5VSYS

VSUS_ON

+5VSUS&5VSUS_USB(3.3A)

L:EMB09N03V

FDMC8 884

SUSB_ON

VSUS_PWRGD

SUSB_ON

CPU_VRON

+5VS&+5VS_USB(4.83A) FDMC8 884

VSUS_PWRGD

VSUS_ON

RT8202 H:EMB09N03V L:EMB09N03V*2

+1.1VSUS (9.62A)

+1.1VSUS 1.1VSUS_PWRGD

VRM_PWRGD

SUSB_ON

EMB09 N03V +3VS

+1.1VS (3.64 A) +1V_APU(5.6A)

AC_OK

EMB09 N03V RT8202 VSD VSC

SUSC_ON

+1.5V

+1.5V

(8.15A)

H:EMB09N03V L:EMB09N03V*2

SYSTEM

SUSB_ON

PM_DPRSLPVR

+1.5VS (1.05A)

FDMC8 884

CPU PSI#

SUSB_ON

+0.75VS (1A)

UP771 3

CLK_EN#

CPU_VRON

RT8870A NB: H:IRF8714 L:IRF8736 CPU: H:IRF8714 L:IRF8736

VDDCR_NB

(10A)

VDDCR_CPU

(11A)

VRM_PWRGD

SVD SVC VDDCR_CPU_SENSE,VDDCR_NB_SENSE,VSS_SENSE,HT_CPU_PWRGD

+1.8VS (2.1A ) MP224 9

3.Power Schematic • Load Switch

• Linear circuit • Switching circuit

• Charger circuit • Power Latch circuit

a) Load switch

5VSYS_USB EN

When EN is high, the mosfet turn on

b) Linear circuit Mp2249: Enable >1.8V Vout begin to climb ，Whem Enable<0.4V will close IC。

Common IC in linear circuit：

The greater voltage drop on MOS, the smaller current allowed

1215T use UP7713 and UP7714 1. POR is granted 2. The REFIN pin can do referebce input then do enable to use， <0.15V will close IC；>0.3V， VOUT use 5mV use begin to climb and Prevent inrush Electric current

UP7713 IC internal structure

LDO Behavior-steady state Steady state Saturation ◎ C

Saturation Cut off

ID(A) 2.2

Ohmic region

Saturation

◎ B

◎ A Off

◎ D

Saturation region

Cut off ◎ E

On

Off VGS=VT+4V

2.0 1.8

VGS=VT+3V 1.6 1.4

VGS=VT+2V

1.2

C ◎

1.0 0.8

D

0.6

VGS=VT+1V

B ◎

VGS=VT

0.4

Cut off region

0.22 0.1

1

1.1

1.2

1.3

1.4

1.5

1.6

◎ 1.7A 1.8

1.9

Output characteristic

2.0

2.1

2.2

VDS(V)

c) Switching circuit---SYSTEM

The basic principle of DC-DC switching circuit is to regulate the output voltage value by controlling the duty cycle.

Vout=Ton/(Ton+Toff)*Vin Duty cycle=Vout/Vin Ton：H-S Turn-on time Toff：L-S Turn-on time

Vdriver+Vboot

Toff

UGATE: Ton

Vdriver

LGATE: Vin

Switching’s advantages compared to Linear： 1.Output voltage can be lower 2. High conversion efficiency

PHASE:

RT8206 introduce Pin

Description

Pin

Description

1

REF: provide 2V reference

14 27

EN1\2: >0.8V IC begin work.

2

TON: Step switching frequency

15 26

UGATE1\2: switching up Gate voltage

3

VCC: Power

16 25

PHASE1\2: switching phasevoltage

4

ENLDO: Contrao 19V transform5VA of LDO with EN

17 24

BOOT1\2: Switching Boot pin

18 23

LGATE1\2: switching Low gateoltage

5

NC

PVCC: MOSFET gate driver power supply

6

VIN: provide switching of input

19

7

LDO: 5VA pin out

20

SECFB:5VSUS->12VSUS charge pump

8

NC

21

GND

9

BYP: provide 5VA,5VSUS transform， when 5VSUS OK after.

22

PGND

10 30

VOUT1\2: 3VSUS 5VSYS PIN out

29

SKIP#: switching mode choose

11 32

FB1\2: Two switching of feedback

12 31

ILIMIT1\2：Two switching of OCP protect

13 28

PGOOD1\2: When VOUT reach92.5% Open drain; <7.5% low

Detail introduction: SS and power off

d) VCORE circuit

RT8870 introduce Pin

Description

Pin

Description

1

RBIAS: : provide 2V reference

15 34

RGND\NB: remote sense GND

2

EN: >2V IC begin work，<0.8V close IC

16 24 28

PGND_NB\0\1: L-S GND

3

SVC: serial VID clock signal

17 25 27

LGATE_NB\0\1: switching Low gate voltage

4

SVD: serial VID data signal 18 23 29

PHASE_NB\0\1: switching hase voltage

19 22 30

UGATE_NB\0\1: switching up Gate voltage

20 21 31

BOOT_NB\0\1: switching boot voltage

26

PVCC: MOSFET gate driver power supply

32 33

ISP1,ISN1:return circuit of electric current

35 36

ISP0,ISN0:return circuit of electric current

5

6

PWROK:<0.57V SVI no work,>0.8V to receive SVI command

PGOOD: VOUT OK after open drain, voltage level decision the pull high voltage

7

DRPSEL: next page

8 40

OCSET_NB\OCSET: Provide over current protect

9

VCC: controller power supply

10 39

FB_NB\FB: output voltage feedback

11 38

COMP_NB: switching regulator error amplifier output pin

12 37

TON_NB\TON：Step switching frequency

13 14

ISP_NB，ISN_NB:return circuit of electric current

Detail introduction: DRPSEL DRPSEL： DRPSEL PIN voltage=5V ，roop no open，Boot‟s voltage=1.4V，SVI no work DRPSEL PIN voltage<=3V ， Boot‟s voltage=1.1V，SVID can regulate VOUT voltage

Detail introduction: SS and power off

Detail introduction: SVID

Detail introduction: protection

e) Charger When use adapter

When use battery only

Vin Vout

When charge the battery

CHG_EN#

Detail introduction: Action Battery present: BAT_IN=high; Battery absent: BAT_IN=low. Adapter present: AC_OK = high;

CHG_EN#

Adapter absent: AC_OK = low; CHG_EN# = low, Charger Enable CHG_EN# = high, Charger Disable

BAT_IN#

Battery Package

SMB1_CLK SMB1_DATA

AC_OK

EC

SMB1_CLK SMB1_DATA

SMB1_CLK, SMB1_DATA: set charge current and voltage

Any of these signals not correct will cause charger works in wrong way.

MB39A132

e) Power Latch When push the power button, or insert adaptor, 3VA & 5VA will exist

When insert battery only,+3V_PL is high,3VA & 5VA will be latched low.

f) Power limit

When the systematic consumption reaches the Adapter consumption, Charger IC will be reduced charged the electric current to protect adapter first, if systematic consumption increase still, Power limit can work and send out PWRLIMIT#x signal to system then to drop frequently .

Common Bug Criteria and Solution • • • • •

Switching Circuit Debug Flow How to make an estimation initially？ How to determine whether MOS is burned？ How to determine whether IC is normal？ LDO circuit debug

1.Switching Circuit Debug Flow MOS Visual Inspection

Inductor，Resister IC and components around

Static Measurement

Input/Output Resistance Confirmation MOS Resistance Confirmation Input/output voltage

Power on Test IC VCC，ENABLE voltage

2.How to make an estimation initially ？ Measure if MOS is short? Visual inspect whether MOS， Yes inductor，capacitor，IC has any burned symptom

Measure if capacitor is short? Measure if IC is damaged?

Yes Change damaged component

For the output： Measure Output Resistance short? Yes

Maybe L-S MOS is burned

Measure MOS to confirm

For the input： Maybe H-S MOS is burned Measure 19V input short?

Yes Maybe L-S MOS is burned Maybe input capacitor is burned

PS：All measurement above is static on board

Measure MOS Measure MOS Change capacitor

3.How to determine whether MOS is burned? Input/output short is commonly due to MOS short，if it is the case, please measure MOSFET first.

Onboard MOSFET in switching circuit criteria

For high side MOS 1.Measure the resistance between Drain and Source, which should be above 50ohm, if so, all high side MOS is considered OK. 2. Measure the resistance between Gate and Source, if it isn‟t above K magnitude, the MOSFET is considered bad.

For low side MOS 1. Measure the resistance between Drain and Source. If not short, all low side MOS is considered OK.

2. Measure the resistance between Gate and Source. If it isn‟t above K magnitude, the MOSFET is considered bad.

Attentions: 1.Please discharge the MOSFET before measurement (mustn‟t power on) : separately short G and S, G and D, D and S one time. (short G and S is necessary) 2.Measurement sequence: measure D,S or G,D first, G,S last

Summary： •

If MOS G-S, G-D resistance is above 1K ohm ,for high side MOS D-S above 50ohm or for low side MOS D-S not short, the MOSFET is OK.

•

Resistance measurement sequence: D-S, G-D, G-S

•

Able to use diode level(

1

) 2to measure voltage between S

and D, above 0.1V is OK. •

The MOS which removed should be confirmed burned or not.

•

If all MOS is changed OK, but output still short, maybe it‟s the problem of IC, or the load device (for Vcore or charger or any other without short pin).

Remove IC, measure the resistance between every pin of IC and GND (compare with good IC)

VOUT VDD FB PGOOD

UGATE PHASE OC VDDP

12 11 10 9

RT8202APQW 5 6 7 8

b. Power on test：

1 2 3 4

GND2 TON EN/D EM NC2 BOOT

a. Static measurement (suggest step):

PU500

NC1 GND1 PGND LGATE

OK, IC is likely damaged.

17 16 15 14 13

4.How to determine whether IC is OK ？If there is no voltage after power on with all MOS

1.Change good IC, check whether output is normal after power on again. 2.If abnormal, check whether the voltage of IC ENABLE and VCC pins is normal (can compare with a good one) . 3. When ENABLE is abnormal, disconnect timing control circuit, check timing control circuit after power on 4.When VCC is abnormal, measure whether the series connected resistors and VCC power rail are OK or not.

5.LDO circuit debug

P U2 1 2 3

E N NC/S S /FB GND V IN V OUT UP 77 14 B MA 5 -00

•

LDO circuits include： +3VA,+VTT_DDR, +2.5VS,+1.5VS

•

Firstly, measure whether output resistance is short or not .

•

Then power on, measure each PIN voltage. Check whether input VIN, VCC, EN/SHDN# is normal to exclude timing problem. Also can check REFIN/SET/FB. Normally, correct REFIN/SET/FB voltage means IC is OK.

•

Last, change IC to exclude the problem of IC self.

5 4

Chapter 3 CHARGE Repair Guide

Overview  Introduction  Diagram  Signal Description  Repair Flow Chart  Q & A (Repair Experience)

Introduction  Battery Pack: -Battery cell -Protection Board Protection circuit Gas Gauge IC : BQ2060H BQ20Z90 -Outer Casing

Rechargeable Battery  Li-Ion Battery  NiMH Battery  NiCad Battery

Energy Density (W-Hr/Kg)

Li-Ion 90

Ni-Cad 40

Ni-MH 60

Operating Voltage Lifetime (approx. cycles)

3.6 1000

1.2 1000

1.2 800

6%/month

15%/month

20%/month

Self Discharge

Features of Li-Ion Battery  Smaller  lighter  Low self-discharge rate  No memory effect  No Pollution  Overcharge or over discharge will have permanent damage

Charging Characteristics (Li-Ion) •CC(Constant current) & CV(Constant voltage)

C.V. C.C.

Glossary #1  Nominal Capacity: - mAH ex: 400mAH = 0.4AH (1A= 103mA) - AH  Nominal voltage: - Ni-MH : 1.2v/cell - Li-Ion : 3.6v/cell (or 3.7v/cell)

Glossary #2  Series & Parallel:

I

Series

V

V

Parallel

Glossary #3  Over discharge -for battery spec. (ex:3.6v Li-Ion, over discharge: under 2.75v~2.5v /cell)  Over charge -for battery spec. (ex:3.6v Li-Ion, 4.3v ~4.35v /cell)  Self discharge  Cycle life -500~1000 (fullemptyfull)

Battery Label

Li-Ion Ni-MH Li-Polymer

Norman Voltage:14.8v - 3.7 v/cell - 4S :4 x 3.7 =14.8v

Battery Capacity -4000mAH -2P: 2 x 2000(mAH) 2000mAH/cell

Connecter(Old)

1

2 3456

Pin

Signal

Description

Type

1

GND

Ground

2

TS

Battery Type

I

3

HDQ_BAT

HDQ Bus

I/O

4

BAT_EDV

End of discharger

I

5

NC

No Connection

6

BAT_S

Battery input/output voltage

PWR(I/O)

Connecter(New)

Battery Pack

Battery connecter

Gas Gauge Board Protection Board

Gas Gauge IC –BQ20Z90H Battery Parameter Record Charge and discharge counting Voltage Temperature Automatic calibration Battery Status Wake up function

Gas Gauge IC –BQ2050H

PIC16C54

HDQ Bus

HDQ

BQ2050H

1

2 3456

Battery Learning  Charge  Full Discharge NAC=0 (Discharge complete) Charge Full

FRAME

FRAME

FRAME

Charge Circuit Sample (Bq20Z90 - (Bq20Z90)

DCIN & LDO & REF

ACIN & ACOK

AC_APR_UC

AC IN A / D_DOCK_IN AC signal to determine is correctly insertion or not.

PKPRES#

MODE Select Setting

3串

2並 3 X 3.6V X 2200 X 2 = 47.520 Wh

2200mAh 2600mAh 2800mAh 6cell 47.520Wh 56.160Wh 60.480Wh 8cell 63.360Wh 74.880Wh 80.640Wh

EC

EC

Repair Flow Chart Start Visual Inspection check Charge IC & EC & related component are no damage

Change defect Charge IC & EC & N.G Component Fix any trace open & BAD solder problem

OK

NG Measure Voltage & CLK

Check which Control signal for device is wrong

Check C.C & C.V Setting

Check Charge IC Voltage, Vcc Pin = A/D_VIN ->19V Check EC IC Voltage & CLK, +3VA_EC, 2.5VREF CLK, 32.768MHz Check PIC IC signal , AC_APR_UC ->Hi (A/D in) TS# ->Lo (BATT in) , CHG_EN ->Hi , CHG_LED ->Hi Check charge IC signal , BAT_CHG_OUT

Change NG X‟tal & RLC Component and fix any trace open NG

Confirm circuit, Change NG related component fix any trace open NG

OK

Trace the related circuit, Change NG related Component/fix any trace open NG

Change ECat firstly , and then Charge IC

Finish

OK

OK

一、charger –MB39A132 1、Adapter/battery transform

Charge voltage, &electric urrent „s set

Charge IC

Only adapter, insert an instant spike CAP absorbed by the system side; AC_BAT_SYS = A / D_DOCK_IN, PQ8903 not conduct, Adapter to the system power supply; ACOK down after, PQ8902 fully on; Only battery, PQ8902 off, PQ8903 conduction, Battery power supply to the system Adapter, Battery are the presence, PQ8902 turn, PQ8903 off, Adapter power supply to the system, while to the Battery Charge; charge IC with current share function, when the system current increases, charging the charge current will decrease.

2、Prepare charge

SMB0_CL K SMB0_DA Battery T

Pack

EC

TS1# BAT1_IN_OC#

Battery DETECT

BATSEL_1 BATSEL_0 VSET_EC ISET_EC CHG_EN AC_IN_OC#

MB39A132

ACOK

Adaptor DETECT

Battery and Adapter must exist. Battery notify the EC his voltage , current, capacity, and message. EC according to the battery state notify the charge IC how to charge or need to charge or not.(Pre-charging \ CC \ CV)

adapter in detect

ACOK=13.7V/17.4V Adapter present： ACOK=Low， AC_IN_OC#= Low Adapter absence ： ACOK=High， AC_IN_OC#= High

Battery in detect

Battery present：

TS1#=Low，BAT1_IN_OC#=Low Battery absence ： TS1#=High，BAT1_IN_OC#=High Note:Have project directly TS1 # and BAT1_IN_OC # to short

3、MB39A132 charging set

SMB0_CLK SMB0_DAT

Battery Pack

EC TS1# BAT1_IN_OC#

Battery DETECT

BATSEL_1 BATSEL_0 VSET_EC ISET_EC CHG_EN AC_IN_OC#

MB39A132

ACOK

Adaptor DETECT Smart charging： EC control the VCHG & ICHG， Model Share the circuit ，Support 2S/3S/4S battery

VSET_EC：EC according to the information of battery, and set the charge voltage of single cell. ISET_EC：EC according to the related number of battery and battery status (Pre-charging or Quick-charging) to set voltage electric current CHG_EN ：When BATSEL_0、 BATSEL_1 、VSET_EC、 ISET_EC setting finished, put CHG_EN to High and start charging.

BATSEL_0、 BATSEL_1

BATSEL_0、 BATSEL_1：EC according to the series connection number, notify the charge IC and according to the VSET_EC message to set Battery charge voltage.

4、 MAX8725 charging set

SMB0_CL K SMB0_DA Battery T

Pack

EC

BATSEL_2P# PRECHG CHG_EN#

MAX8725

TS1# BAT1_IN_OC#

Battery DETECT

AC_IN_OC#

CHG_AC_OK

Adaptor DETECT

BATSEL_2P#：Ec tell Charge IC about battery’s pack ，Set CC， BATSEL_2P# =Low，is a 2P/3P battery，ICC=2.5A； BATSEL_2P# =High，is a 1P battery，ICC=1.5A。 PRECHG：EC detect the Battery Voltage <3V*Cells，PRECHG=1， Battery-Pack into the Pre-Charging Mode，charge current=150mA CHG_EN#：EC detect the Battery ,when it reach the condition of charging ， CHG_EN# = 1, Charger Disabled; CHG_EN# = 0, Charger Enabled

5、MAX17015 charging set

SMB0_CL K SMB0_DA Battery T

Pack

VSET_EC ISET_CTL

MAX17015

EC

TS1# BAT1_IN_OC#

Battery DETECT

AC_IN_OC#

CHG_AC_OK

Adaptor DETECT Smart charging： EC control the VCHG & ICHG， Model Share the circuit ，Support 2S/3S/4S battery

VSET_EC：EC according to the information of battery, and set the charge voltage of single cell.

ISET_EC：EC according to the related number of battery and battery status (Pre-charging or Quick-charging) to set voltage electric current CHG_EN ：When BATSEL_0、 BATSEL_1 、VSET_EC、 ISET_EC setting finished, put CHG_EN to High and start charging.

d) Charger

When use adapter

8

7

6

5

D1

D2

D2

1

P

P

G2

G1

1 3

P C31 0.1 UF/25 V

1

1

2

1

2

P D6 B A T 54 CW

P R38

1

1

P C32 0.1 UF/25 V

P R37 10 0K Oh m

P JP 8 /X S HORT _ P IN

P JP 9 /X S HORT _ P IN

P R39 1

D

G

8 7 6 5

BAT

When use battery only

P Q9 E MB 20 P0 3G

2

10 K Ohm 2MOh m

2

2

2

P Q10 A UM6K 1 N

GND

1

CHG_ACOK# = 0, Adaptor Mode

Vin

P L5 70 Ohm /1 00 Mhz 2

8 7 6 5 D

P C33 10 UF/2 5V

A C_B A T _S Y S

2 P L6 70 Ohm /1 00 Mhz

1

P Q12 E MB 20 N0 3V

P _CHG_P HA S E _2 0

2

GND P C36 0.1 UF/25 V 2 1

1

/X P C35 1

1

3

2

2

1 P _CHG_V IN_S

2

2 S

P _CHG_A COK #_ 10 43 ,49

CHG_ACOK# = 1, Battetry Mode

5

2N7 00 2 G

1

2 P _CHG_A COK #_ 10

P_CHG_AIRS-_5

P Q11

11

P _A C_ AP R_ UC_ 10 P T 25

D

P_CHG_AIRS+_ 5

23

P R41 10 0K Oh m 3

6

1

2

1

2

P R40 1Oh m

S

1 2 3 4

2

2

4

3

2

1

V mi d

GND3 GND4 GND5 GND6 MB 39 A 13 2

1 10 K Ohm

2

P_ADIN_ SNU_S

S2

P U3B 34 35 36 37

A C_B A T _S Y S GND

P R36 S1

P T 13 T P C26 T

1

P Q8 E MB 24 B0 3G

P C30 47 00 P F/5 0V

D1

1

1

1

P T 12 T P C26 T P R35 15 mOh m 2

A /D_ DOCK_ IN

P C34 10 UF/2 5V

10 00 P F/5 0V GND

S 4 3 2 1

P _A C_ AP R_ UC_ 10

P T 26

P RN62 B

1

1

2

1

P _CHG_CT L 1_ CTL 2_ 10 2

1

P Q14 A UM6K 1 N

P C53 10 00 P F/5 0V

2

P R54 10 0K Oh m

2

P _CHG_INE 3-_ 10

T P C26 T P T 15 /X

1

2

+3 V A P R53 10 K Ohm 1% /X

P R52 56 K Ohm 1 P C51 /X 12 0P F/50 V

1

GND

1

+5 V S US

P C49 82 0P F/50 V 2 1

2

CHG_E N#

GND

32

1

CHG_E N# = 0 , Charger E nable CHG_E N# = 1 , Charger Disa ble

CHG_EN#

+3 V A P R57

B A T _IN

10 0K Oh m

2 S

P Q14 B UM6K 1 N

GND V CC S CL OUT 1 S DA OUT 2

P _6 26 8_ V CC P _CHG_A DJ CV_ 10 P _CHG_A DJ CI_ 10

5

1

38 ,43

B A T _IN# P C57 0.1 UF/16 V

/X

2

P C58

2

UP 62 68 A MA 6 10 0K Oh m

6 5 4

4

32 ,38 S MB 1_ CL K 32 ,38 S MB 1_ DA T A

P C56 /X 0.0 1UF/2 5V

1

1

P RN62 D

1

P U4 1 2 3

8 5

2

+5 V S US

3

G

10 0K Oh m

P C55 0.1 UF/25 V

GND P Q16 2N7 00 2

2

G

32

2

6 P RN62 CS 2

0.1 UF/16 V

2

7

GND

GND GND GND GND

GND

GND

2

2 P R51 22 K Ohm 1

D

11

GND

P C48 0.1 UF/16 V

GND

GND

3 3

3

3

11

2

2 GND

1

A C_OK P Q15 3 2N7 00 2

10 UF/2 5V

When charge the battery

10 0K Oh m

D

1

1

1

1

2

2 1

4 3 2 1

1

1 5

2

GND

1

2 2

2

1

GND

P C47 0.1 UF/16 V

P C42

P _CHG_CIRS +_ 5

P _CHG_V B T T _1 0

2 4 2

1

1

2

A /D_ DOCK_ IN

10 UF/2 5V

P _CHG_CIRS -_5

P C46 0.1 UF/25 V

P C41

+3 V A

2

P R56 10 K Ohm P RN62 A 10 0K Oh m

P JP 1 2/X S HORT _ P IN

2

1

33 32 31 30 29 28 27 26 25 P C54 0.1 UF/16 V

GND

P JP 1 1/X S HORT _ P IN

1Oh m

GNDGND

2 V mi d

P R48 33 K Ohm

P C45 0.1 UF/16 V

2

1

P _CHG_V B T T _1 0

25 mOHM

P R45

GND

P C50 33 00 P F/5 0V P C52 P R55 12 0P F/50 V 1K Oh m 2 1 2 1

BAT

2

P JP 1 0/X S HORT _ P IN

P _CHG_L G_2 0 P _CHG_RT _ 10 P _CHG_CS _ 10 P _CHG_A DJ CV_ 10 P _CHG_V B T T _1 0

P _CHG_CIRS +_ 5 P _CHG_CIRS -_5 P R50 10 K Ohm

GND

MB 39 A 13 2_ VRE F

P _CHG_V IN_1 0 P _CHG_CT L 1_ CTL 2_ 10

1

6.8 UH P C40 10 00 P F/5 0V

1

GND

24 23 22 21 20 19 18 17

P U3A MB 39 A 13 2

12

GND

P R42 2

6

BAT_LEARN = 1, Bat tery discharges

V IN CT L1 GND1 V RE F RT CS A DJ3 BAT T

1

1 2

2

P R49 10 0K Oh m 2

1UF/25 V

9 10 11 12 13 P_CHG_ADJCI_ 10 1 4 P_CHG_COMPCI_ 1 510 P_CHG_COMPCV_ 101 6

1

1CHG_COMPAI_1 0

1 1

P C44

GND2 CTL 2 CB OUT1 LX VB OUT2 PGND CEL LS

2

2

1 1

P R47 37 .4K Ohm 1%

2

2

P C43 0.1 UF/16 V /X

V CC -INC1 +INC1 A CIN A COK -INE 3 A DJ1 COMP1

-INE1 OUTC1 OUTC2 +INC2 -INC2 ADJ2 COMP2 COMP3

3 2 3

P R46 22 K Ohm

5

B A T _L EA RN

4

32

P _CHG_A CIN_1 0 P _CHG_A COK #_ 10 P _CHG_INE 3-_ 10

1

1

ACIN

1 2 3 4 5 6 7 8

G

P R44 20 0K Oh m

P Q13 E MB 20 N0 3V

GND

S

P R43 22 0K Oh m

P Q10 B UM6K 1 N

GND

CHG_V CC

P_CHG_SNU_ S

P D8 /X B A T 54 CW

P C39 1UF/16 V

8 7 6 5 D

CHG_V CC

1

MB 39 A 13 2_ VRE F

P L7 1

2

A /D_ DOCK_ IN

GND

P _CHG_HG_ 20

2

GND

Vout

P T 14 T P C26 T

2

1

2

2

1

P C38 /X 0.0 1UF/2 5V

P_CHG_BST_2 0 P_CHG_HG_2 0 P_CHG_PHASE_ 20 P_CHG_VL_ 20 P_CHG_L G_2 0

1

P C37 /X 0.0 1UF/2 5V

GND

G

P D7 B A T 54 CW

GND

32

Battery present: BAT_IN=high; Battery absent: BAT_IN=low. Adapter present: AC_OK = high;

CHG_EN#

Adapter absent: AC_OK = low; CHG_EN# = low, Charger Enable CHG_EN# = high, Charger Disable

BAT_IN#

Battery Package

SMB1_CLK SMB1_DATA

AC_OK

EC

SMB1_CLK SMB1_DATA

SMB1_CLK, SMB1_DATA: set charge current and voltage

Any of these signals not correct will cause charger works in wrong way.

MB39A132

Chapter 4 CLOCK Repair Guide

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

结构图-1 CLK_CPU_BCLK CLK_CPU_BCLK#

CPU

CLK_MCH_BCLK CLK_MCH_BCLK# CLK_REQ_MCH#

MCH

CLK_MCH66 (AGP/Hub-link) CLK_MCH_3GPLL (PCI-E x16 /with DMI-link) CLK_MCH_3GPLL# (PCI-E x16/with DMI-link)

CLOCK Generator (1)

DREFCLK (for GMCH) DREFCLK# (for GMCH) CLK_AGP66 (AGP) CLK_PCIE_PEG (PCI-E) CLK_PCIE_PEG# (PCI-E) CLK_VGA27 CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_ICHHUB CLK_PCIE_ICH (PCIE x1) CLK_PCIE_ICH# (PCIE x1)

(Hub/DMI) (PCI-E) (GMCH)

VGA (AGP/PCI-E)

ICH (HUB) (PCI-E)

结构图-2 CLK_CBPCI

CARDBUS

CLK_MINIPCI

MINIPCI

CLK_LANPCI

LAN

CLK_SIOPCI

CLK_SIO_14M

SIO

CLK_KBCPCI

KBC

CLK_FWHPCI

FWH

CLK_PCIE_NEWCARD

CLOCK Generator (2)

CLK_PCIE_NEWCARD#

NEWCARD

CLK_REQ_NEWCARD# CLK_PCIE_MINICARD CLK_PCIE_MINICARD#

MINICARD

CLK_REQ_MINICARD#

SMB_CLK SMB_CLK X‟tal 14.318MHz

CPU_BSEL0~2 CLK_EN# +3V_CLK

depends on CPU type

Generator Distribution-W5F Sample +3VS_CLK

ICS 954310BGLFT

1,7,11 21,28,42 45,50,56 BSEL1

16

VTT_PWRGD# 10 1 2

57 58 X‟tal 14.318MHz

2,6,13 29,37,46 53,59

52 51 44 43 40 19 20 14 15 9 12 60 39 38 5 8 3 64 4

22 23

CLK_CPU_BCLK CLK_CPU_BCLK#

Yonah-CPU (Dual Core)

CLK_MCH_BCLK CLK_MCH_BCLK# CLK_REQ_MCH# CLK_MCH_3GPLL CLK_MCH_3GPLL# DREFCLK DREFCLK# CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_PCIE_ICH CLK_PCIE_ICH# CLK_CBPCI CLK_LANPCI CLK_KBCPCI CLK_TPMPCI CLK_FWHPCI

Calistoga GMCH (945GM)

KBC

M38857

FWH 49LF004A

MCH_3GPLL 100 MHz for PCIE/DMI DREFCLK 99 MHz for graphics ICHPCI ICH7 PCI Bus 33 MHz USB48 USB 48MHz ICH14 ICH7 14 MHz PCIE_ICH S.B PCIE(x1) 100MHz

ICH7-M CARDBUS R5C832

BCLK 133/166 MHz FSB 533/667 MHz

LAN RTL 8101 TPM Device

CLK_PCIE_MINICARD/MINICARD# CLK_REQ_MINICARD#

MINICARD

CLK_PCIE_NEWCARD/NEWCARD# CLK_REQ_NEWCARD#

NEWCARD

CBPCICARDBUS 33 MHz LANPCILAN 33 MHz KBCPCIKBC 33 MHz TPMPCITPM 33 MHz FWHPCIFWH 33 MHz

Generator Distribution-W6A Sample ICS 954213

+3VS_CLK

1,7,8,13 22,29,33 37,42,48

VTT_PWRGD#

FSLC

16

R219 680 ohm

44 43 35 34

32 31 14 15 9 11 53 25 26 56

1 2

49 50

X‟tal 14.318MHz

2,6,12,30 38,45,51

54 55 3 4

CLK_CPU_BCLK CLK_CPU_BCLK#

BCLK 100/133 MHz F.S.B 400/533 MHz

Dothan-CPU

CLK_MCH_BCLK CLK_MCH_BCLK#

Alviso GMCH

CLK_MCH_3GPLL CLK_MCH_3GPLL# DREFCLK DREFCLK#

(915GM)

CLK_ICHPCI CLK_USB48 CLK_ICH14 CLK_PCIE_ICH CLK_PCIE_ICH# CLK_CBPCI CLK_LANPCI CLK_MINIPCI CLK_KBCPCI CLK_FWHPCI

MINIPCI (WLAN)

DREFCLK 99 MHz for graphics ICHPCI ICH6-M PCI Bus 33 MHz USB48 USB 控制ler 48MHz ICH14 ICH6-M 14 MHz PCIE_ICH ICH6-M PCIE(x1) 100MHz

ICH6-M CARDBUS R5C841

MCH_3GPLL 100 MHz for PCIE/DMI

CBPCICARDBUS 33 MHz

LAN RTL 8100CL

KBC M38857

LANPCI for LAN 控制ler 33 MHz

MINIPCI for WLAN Card 33 MHz KBCPCI for Keyboard 控制ler 33 MHz

FWH 49LF004A

FWHPCI for BIOS CLK 33 MHz

Frequency Programming

ICS954213 Datasheet (for Sonoma 平台)

ICS954213-Block 结构图

Pin 描述(1)

Pin 描述(2)

ICS954310 Datasheet (for Napa 平台)

ICS954310-Block 结构图

Pin 描述(1)

Pin 描述(2)

Pin 描述(3)

Ordering Information

Repair Flow Chart Start Visual Inspection check CLK Gen. and related component are no damage

OK

Change Defect CLK Gen.& N.G Component Fix any trace open & BAD solder problem NG

Measure CLK Gen. Voltage

Check CLK Gen. Voltage, +3V_LAN

Change NG RLC Component and fix any trace open

OK

NG Measure X‟tal 14.318 MHz

Measure & Check X‟tal 14.318MHz

Change Defect X‟tal or related Capacitor Component

OK

NG Measure CLK Gen. Controller Signals

Check CLK Gen. Controller Signals, VTT_PWRGD#

Confirm circuit, Change NG related component fix any trace open

OK

NG Check which CLK signal for device is wrong

Confirm circuit, Check related trace & resistor, capacitor

Change NG RLC Component /fix any trace open NG

Change CLK Generator

Finish

OK

Repair Technique-Visual Inspection Visual Inspection

To check Clock Generator and X‟tal and related components are not damaged.

X‟tal 14.318MHz

Fix any trace open & BAD solder problem.

CLK Gen.

1

Repair Technique-Measure Voltage Use Multi-Meter or Oscilloscope to measure : Clock Gen. voltage (+3V_CLK) =3.3V is ok.

+3V_CLK=3.3V

2

Repair Technique-Measure CLK X’TAL Use Oscilloscope to measure : X‟TAL clock =14.318MHz is ok. 3-1

X‟tal CLK=14.318MHz

3-2

Repair Technique-Measure Control Signal Use Multi-Meter or Oscilloscope to measure Clock Gen. Control Signal voltage (VTT_PWRGD#) =0V is ok.

Ps: (when press power bottom the VTT_PWRGD# signal status is from 3.3V0V) VTT_PWRGD#

4-1

CLK Gen. CPU Power IC

4-2

Repair Technique-Check Individual NG signal Use Oscilloscope to measure every individual CLK signal. If find error please trace the circuit to find it‟s connection. If related RLC components are ok but CLK still is NG please try to change CLK generator at last. 5

Chapter 5 HDMI Repair Guide

Overview  Connector Pin Definition  Block diagram  Schematic  Debug Tips

Connector Pin Definition PIN

Description

1

TMDS Data 2+

2

TMDS Data 2 GND

3

TMDS Data 2-

4

TMDS Data 1+

5

TMDS Data 1 GND

6

TMDS Data 1-

7 8 9

TMDS Data 0+ TMDS Data 0 GND TMDS Data 0-

10

TMDS Clock +

11

TMDS Clock GND

12

TMDS Clock -

13

CEC

14

N.C

15

DDC CLOCK

16

DDC DATA

17

DDC/CEC GND

18

+5V Power

19

Hot Plug Detect

Block diagram • With level shifter

MB +3Vs

TMDS DATA [2:0]

TMDS DATA [2:0]

PCH TMDS CLOCK DDC CLK/DAT

Hot Plug Detect

Level Shifter

TMDS CLOCK DDC CLK/DAT

Hot Plug Detect

HDMI connector

Schematic

HDMI conn.

Level shifter

Chapter 6 Touch Pad Repair Guide

Overview  Diagram  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +5V

+3V

LPC

SB

CLK DATA GND

KBC

CLK_KBCPCI

X‟TAL

33MHz

8MHZ

Circuit KBC

CONNECT

M38857 Pin Define

M38857 Pin Describe 1

M38857 Pin Describe 2

M38857 Pin Describe 3

Repair Flow Chart Start

Visual Inspection Check Connector & RLC components is OK

Change Defect Connector & OK damaged RLC components NG Be sure the function is no disable in O.S

Check Fun. setting

OK

NG Check KBC Voltage & CLK, +3V , CLK_KBCPCI = 33MHz X‟tal = 8MHz . Check T/P Connector Voltage, +5V

Measure Voltage & Clock

Use meter to measure Signal‟s bias voltage value is ok

Check T/P signals, INTCLK_Q3 INTDATA_Q3

Trace circuit, Change NG Component and fix any trace open NG

Change NG related R.L Component OK or fix trace open problem NG

Change KBC Controller Chip

NG Change South Bridge

OK Finish

OK

Repair Technique-Visual Inspection 1

Visual Inspection 1.check TOUCH PAD connector is OK or not

2.R.L.C. components is not miss or damage

CID

Repair Technique-Function Setting 2-1

2-2

Function Setting check TOUCH PAD Function is no disable in OS.

Repair Technique-Measure Voltage 3-1

Use multi-meter or Oscilloscope to measure KBC Voltage.

+3V is ok.

3-2

Use multi-meter or Oscilloscope to measure T/P Connector Voltage. +5V is ok.

Repair Technique-Measure CLK 4-1 Use Oscilloscope to measure KBC CLK. CLK_KBCPCI = 33MHz, X‟tal = 8MHz,

4-2

KCB X‟tal =8MHz

Repair Technique-Measure T/P signals Check T/P Signal 5 GND

1. Use multi-meter to measure INTCLK_Q3, INTDATA_Q3 are correct

test point

2.if the value is high please check resistor or Inductance and circuit of the trace is no damage and no open.

If the problem is still existing, please change Touch Pad Controller K/B Chip

Repair Technique-Diode Value of T/P Pin PIN1,2,3,4,5,6

PIN

Signal name

Diode value

1

+5VS_TP

591

2

+5VS_TP

591

3

INDTATA_5S

602

4

INTCLK_5S

602

5

GND

0

6

GND

0

6

FFC Cable Pin Define Pin top-top top-bottom

metal Top-Top Top_Bottom

Touchpad Left -Right PS2 Transmit interfaces

Touchpad ---TP_CLK TP_DAT Export the normal wave

Touchpad TouchpadLeft Left-Right -Right

When the button is going down, the signal reveals the normal response

Chapter 7 Keyboard Repair Guide

Overview  Diagram  Circuit  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram-1 +3V KSO0 ~KSO15 KSI0 ~ KSI7 KEYBOARD CONNECTOR

Keyboard control IC

LPC Ex: M38857M8

X‟TAL

CLK_KBCPCI

8MHZ

33MHz

KEYDETECT1 KEYDETECT2

Array resistor

+3VS

SB

Diagram-2  Embedded Keyboard controller -Matrix

 PS : Maybe there is no Super IO in new NPI model, because there are no PS/2 Port, COM Port or Print Port etc. on those model.

Diagram-2

Circuit-W6A

Circuit-W6A

Repair Flow Chart Start

Visual Inspection Check Connector & Resistor component no damage

Change Defect Connector & damaged Resistor component

OK

NG Check Connector Pin no short & open /change new one KB to testing

Check Connector Pin & KB FPC

OK

NG

Use meter to measure Signal‟s bias voltage value is ok

Confirm the circuit, Check array Resistor & trace is OK

Change Defect Component or fix trace open

OK

NG

Check KBC power(+3V) & CLK(8MHz/33MHz) is OK ?

Check NG signal connect to which capacitor & resistor & Trace

Change Defect Component or fix trace open problem NG

Change KBC Controller Chip

Finish

OK

Repair Technique-Visual Inspection Visual Inspection 1.check K/B connector is OK and Fix any trace open. 2.Array Resistor are no damage or miss and Fix any trace open. 3.Check KBC and related component are OK. 1-1

If V.I check is OK, and problem still is exit. Please change New one K/B to Test at first.

1-2

Repair Technique-Measure K/B signals Use multi-meter to measure K/B connector Pin signal is normal of Diode value. If the value is NG, please trace and confirm the circuit to fix any trace or array resistor problem.

接地 测量点

4

If the problem is still existing please change S.I.O (super I/O) controller.

Repair Technique-Diode Value of K/B Pin 25

1~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~24

W6A K/B

26

Repair Technique-Diode Value of K/B Pin 30

A3N K/B

28~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~1

29

Key Board

KSI is nature Pull high 3.3V KSO design is Open Drain need pull High by outside

Keyboard function ERROR Keyboard button no clicked feeling

Chapter 8 AUDIO Repair Guide

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram(1) AC97 Pin1,Pin9 : Pin2,Pin3 : +3VS_Code 24.576MHz

内部 Speaker

SB

AD1885 外部 Speaker

5-pin serial data transaction : (1) BIT_CLK (2) SYNC (3) RESET (4) SDATA_IN (5) SDATA_OUT

Pin25,Pin38,Pin43 : +5VS_AUDIO

AC97:ALC650 , AD1885 Azalia:ALC660 , ALC861 , ALC880 , AD1986

Diagram(2) Azalia Pin1,Pin9 : +3VS_Code

Internal Speaker

SB

ALC880 External Speaker

(1) BIT_CLK (2) SYNC (3) RESET (4) SDATA_IN (5) SDATA_OUT

Pin25,Pin38 : +5VS_AUDIO

AC97:ALC650 , AD1885 Azalia:ALC660 , ALC861 , ALC880 , AD1986

HD Audio Code Circuit-1 sample F50N

HD Audio Code Circuit-1 sample F50N

HD Audio Code Circuit-1 sample F50N

HD Audio Code Circuit-2 sample M51A

ALC663

HD Audio AMP Circuit-2 sample M51A

Pin Assignment-(HD-ALC269)

Signal Description-1(HD-ALC269)

Signal Description-2(HD-ALC269)

Signal Description-3(HD-ALC269)

Pin Assignment-(HD-ALC663)

Signal Description-1(HD-ALC663)

Signal Description-2(HD-ALC663)

Signal Description-3(HD-ALC663)

Theorem  HD link (Azalia link)

H/W Architecture

AC-Link bus is the pathway that codec communicate with controller

HD link (Azalia link)  Azalia is an enhanced replacement for AC’97  Designed for a range of audio, modem, and communications functionalities  Targeted for PC’s and other devices like consumer electronics (CE)  Improves on AC’97 design limitations  Provides bandwidth for future audio and communication needs  First Intel product intercept: ICH6

Filters Filters Audio Modem Azalia Bus Driver

Link

PCI Express Codecs

Controller

Software

Azalia Enables High Quality Integrated Audio

Intel® ICH6 Azalia and Legacy AC ’97 Codecs must ALL be either AC ’97 or Azalia

ICH6 AC ’97 Legacy

Azalia 控制ler

Modem Codec

AC Link

or

PHY

Audio Codec

Azalia Link

• AC ’97 & Azalia • 1 Serial Data Out (SDO), 3 Serial Data In (SDI)

• • •

pins: support up to 3 codecs 8 Independent DMA operations 4 Input, 4 output streams 24 MHz BITCLK is driven by the Intel® ICH6

Dock

Dock Codec

Audio Band width with Azalia 

With AC’97: Consumer with analog output  Multi-channel Out: 6 channel, 20bit, 96kHz = 11.5Mb  Total Out: ~11.5Mb (of about 11.5Mb available)



Azalia designed to support multiple streams



With Azalia: Consumer with analog output  High Quality Audio Out: 8 channel, 24bit, 192kHz stream = 36.9Mb  Modem Out: 1 channel, 16b, 48kHz = 0.77Mb  Telephony Out: 2 channel, 16b, 48kHz = 1.54Mb  Total Out: ~39Mb (of about 46Mb available)



With Azalia: Laptop with integrated array microphone  Array Mic Input: 8 channel, 16bit, 96kHz = 12.2Mb  Independent Telephony Input: 2 channel, 16bit, 48kHz = 1.54Mb  Total In: ~14Mb (of about 23Mb available)

Lots of Bandwidth to Support Current and Future Audio

Azalia improvement Over AC’97 AC’97

Azalia

Benefit

 20-bit, 96 kHz multi-channel  32-bit, 192 kHz multi-channel

 More accurate, better quality sound

 11.5 Mb/s max bandwidth

 48 Mb/s per SDO, 24 Mb/s per SDI

 Bandwidth for more channels and mic array inputs at higher sample rates

 Fix bandwidth assignment, fix slot base protocol

 Dynamic bandwidth assignment

 B和width delivered where it’s needed

 Pre-defined DMA use age

 General purpose DMA’s

 Support for multi-streaming / multiple similar device types can be supported

 Single stream support (in & out)

 Support for multiple streams (in & out)

 Support for new Digital Home / Digital Office useage models

 Clock provided by primary codec

 Clock provided by the Intel® ICH

 Single, high-quality, stable clock source for synchronization

 Stability depending on SW provider (IHV’s drivers)

 Unique Microsoft bus driver

 Single bus driver for more OS stability & base functionality

 Limited device sensing / jack retasking

 Full device sensing / jack retasking

 Support for full audio PnP

 2-element (stereo) array mic support

 16-element array mic support

 More accurate, better quality voice input & recognition

Azalia Improves on Current AC’97 Spec

Repair Flow Chart Start Visual Inspection check Int.&Ext. SPK Con. and damage RLC & AMP. component

Change damaged component / fix any trace open

OK

NG Check Setting in the BIOS, The Audio Function must be is UNLOCK

Check BIOS setting

OK

NG

Check Audio Voltage

Check Audio Clock

Measure Audio Code Voltage: +3VS_Code and +5VS_Audio Measure Audio AMP. Voltage: +5VAMP

Fix or change any R.C.L.Q component related to Voltage

Measure Audio Code CLK: 24.576MHz (only AC‟97 model)

Change any NG component related to X‟tal.

OK

NG OK

NG Measure Audio AMP. SE/BTL# : H: for Int. SPK ; L: for Ext. SPK

Check Audio Control signal

Change any NG component related to NG signals

OK

NG Use multi-meter to compare other Audio signal with Good M/B

Measure other Audio signals

Change any NG component related to NG signals NG

NG

Change Audio Code chip OK

Change S.B Finished

OK

Repair Technique-Visual Inspection

NG

CID Case

OK 1-1

Visual Inspection 1.check External/Internal audio connector is OK 2.Related R.L.C/AMP ..etc components is not miss or damage 3.AC‟97/Azalia Code & nearby component is no damage or burn

External Speaker Connector CID Case

接口 Broken

1-2 Internal Speaker Connector

Repair Technique-Check BIOS Setting Check Setting in BIOS 1.Firstly ,load BIOS default setting 2.Please check Audio/Modem Interface function is not Locked status. 2

Repair Technique-Measure Audio Voltage(1) +3VS_Code

+5VS_Audio

Measure AC‟97 Code Voltage : Pin 1/9: +3VS_Code

Pin 25/38/43: +5VS_Audio Pin 4/7:GND ( Digital ) Pin 26/40/44:GND ( Analog )

3

Repair Technique-Measure Audio Voltage(2) +3VS_Code

+5VS_Audio

Measure Azalia Code Voltage : Pin 1/9 : +3VS_Code Pin 25/38 : +5VS_Audio Pin 4/7 : GND ( Digital )

Pin 26/42 : GND ( Analog )

4

Repair Technique-Measure AMP Voltage Measure Audio AMP Voltage : Pin 7/18 : +5VAMP

5

Repair Technique-Measure Audio CLK Only for AC‟97: Measure AC‟97 Code CLK :

Pin 2/3 : 24.576MHz

24,576MHZ

6

Repair Technique-Measure Audio Signal Use Multi-Meter to measure other Audio signals‟ bias voltage value. (This method should be compared with good MB) If the symptom is still existing please try to change Audio chip. 7

After change Audio chip the problem is still constant please try to change SB at last.

P.S. AC97 Audio chip through link connect to SB.

AC97

HA Audio chip through Azalia link connect to SB.

Audio

ALC269

To S/PDIF

Head Phone

From PCH From MIC To Amplifier

Repair skill • General repair rule: – 1. Check Software environment seting:BIOS Driver version

Make sure is the latest version and Device is lock. 2. – Volume settings, mute, or if there is sound or voice pulled minimal Bar Have the right to set the output of the device ... etc.

3. Include Speaker or Microphone=> Connector=>Cable=>Codec IC

HP Jack &S/PDIF

Amplifier • TI----TPA3110 Class D Amplifier INT Left Speaker Close AMP output (Mute)

AMP Power

INT Right Speaker

MIC • INT or EXT MIC Schematic: To ALC269 Codec

Repair skill • EXT MIC & Head Phone detect the way of examining

Chapter 9 MODEM Repair Guide

Overview  Diagram  Circuit  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram RJ-11

Azalia BUS RESET# & SYNC BIT_CLK

TIP & RING

Modem Board CON. Modem

SB

Circuit

Repair Flow Chart Start Check Driver and Re-Ass‟y and MDM cable

Verify Software and Ass‟y problem

OK

NG Visual Inspection

Check1.RJ-11 CON. 2.Modem CON. (on the M/B) 3.Connection RLC component

Change Defect Component & Re-solder

OK

NG Check Modem Type (by model) OK /Change New one Modem Board

Check Modem Board is OK ?

NG

Check Modem CON. VCC(+3V) And RJ-11 CON. Signal is OK ?

Check AUDIO Link BUS Signal is OK ? (AC97/Azalia)

1.Check Power source to Modem CON. Resistor and Trace 2.Check RJ-11 TIP / RING signal

Use multi meter to measure1.BIT_CLK & SYNC 2.SDATA_IN/OUT 3.RESET#

Change Defect Component /Repair open trace NG

Change audio Codec or audio controller (S.B) NG

Finish

OK

OK

Repair Technique-Visual Inspection RJ-11 1-1 CID

Visual Inspection 1.check RJ-11 connector is no Damage or Pin bend or Pin bad solder. 2.check Modem connector is no Damage or Pin bend or Pin bad solder.

Modem Connector (M/B)

CID

1-2

3.R.L.C. components is not miss or damage 4.Check PCB trace is no open or scratch

Repair Technique-Software Skill 2-1

Software Skill 1.check Hardware Device is OK or not. 2.Check Device is working and software driver is correct. 3.Check Device Setting up is correct

2-2

Repair Technique-Assemble Problem 3-1 Assemble Problem Check Assemble MDM Board connector to M/B connector is close ,and Cable is no scratch or damage

3-2

If problem still exist, 1.Please Check Modem Board is correct for testing model, 2.change new one to test.

Repair Technique-Measure Modem Signals 4

Use multi-meter to measure Modem signal is normal of Diode value. If the value is NG, Please check Audio codec and Audio Controller release circuit.

Repair Technique-Diode Value

Modem Board CON. Signal Name BIT_CLK

RJ-11

Diode Value 391

SYNC

426

RESET#

391

SDATA_IN

391

SDATA_OUT

391

Signal Name

Diode Value

TIP

OL

RING

OL

Chapter 10 USB Repair Guide

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram

Signal Description

Pin Define

Signal

Description

1

VSUS

Power signal

2

D-

Data signal

3

D+

Data signal

4

GND

Ground signal

Repair Flow Chart Start

1.Visual Inspection 2.Check Connector & Pins is OK ?

Change Defect Component & Re-solder

OK

NG

Check USB Vcc(5V) is OK ?

OK Check Fuse or Inductor and Trace

Change Defect Component NG

Use multi-meter to measure Check USB- & USB+ Signal is OK ?

Check USB 48MHz is OK ?

Check Resistor or Inductor and Capacitor and Trace and S.B

OK Change Defect Component NG

Check Resistor and CLK Gen. and Trace

OK Change Defect Component NG

Change S.B

Finish

Repair Technique-Visual Inspection USB Connector Broken

•Check USB connector is ok or not

1-1

•Check FERRITE BEAD is open or broken

1-2

Repair Technique-Measure Voltage & GND •Check +5V_USB

2-1

Check GND

2-2

Repair Technique-Measure USB Signals •Check USBP+

3-1

•Check USBP-

3-2

Repair Technique-Diode Value of USB Pin 4

Pin 1,2,3,4

Signal Name

Diode Value

Between

1

+5V_USB

701

+/- 5

2

USBP-

604

3

USBP+

605

4

GND

0

+/- 5

+/- 5

Internal USB device Schematic

USB port • HM65 has 12 USB2.0 port

USB2.0 Schematic USB Power

USB Power To PCH

DataData+

GND

USB 2.0 Schematic

Pin Define 1

VSUS

+5V Power

2

D-

Data

3

D+

Data

4

GND

Ground

Repair skill • General repair rule: – 1. Check Software first: BIOS Update USB device Lock。 2. Check H/W have bad or ok。

– 3.H/W include USB Connector=>IO Board Cable=> PCH last

USB3.0

Schematic介紹 CLK & PCIE

POWER

If it is found external USB3.0 DEVICE can not recognize the external, may be used for confirmation ： ＊External device and cable is the normal state? ＊Device Manager the device is abnormal? If there is an exclamation point, to re-install the device in the OS, the driver, further confirmation. If the device can not see to open the machine to be recognized as a measurement signal can be sure the system clock is normal to provide? If the clock normal, and we have the power part of the measurement, including the device itself its own power (+3 V_USB3 / + VCC_12A), the general line on the road there will be short pad to enable us to confirm that the power system or the device.

There are problems, there is another external device provided to the power (+5 V_USB30 also need to confirm, and use the oscilloscope to confirm that the external device is plugged in, whether caused by power lost

Chapter 11 PCMCIA Repair Guide

Overview  Diagram  Theorem

Diagram +3V +5V VCC3_EN VCC5_EN

VCC Power 控制芯片 (R5531V002)

+3V CCLK#

CRESET#

SB

CAD[0:31] C架构#

PCI BUS

CLK_CBPCI (33MHZ)

X‟TAL

24.576MHZ

VPP

Slot Pinout (F3H)

CardBus Power Circuit(F3H)

Chapter 12 IEEE 1394 Repair Guide

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +3V X‟tal : 24.576Mhz

PCI Clock:33MHz

SB R5C841 SMBus +3V EEPROM

1394 接口

Circuit

R5C841

Pin Define

R5C841

1394a Connector 6 Pin

4 Pin

1394b Connector 9 Pin

EEPROM Pinout

AT24C02N

Repair Flow Chart-(1) Start

Fail Next Page

1394 ID Error OK

OK

OK

Visual Inspection Check 1394 Connector/Related Component no damage Can Write 1394 ID ? Check 1394 ID is OK ? PASS NG Re-write 1394 ID Address Check BIOS setting

Check 1394 setting is unlock in the BIOS. Change NG Component /Fix any trace open

Change NG Component

Check 1394 +3V Voltage,

Measure 1394 Voltage

Check 1394 CLK 24.576/33MHz

Measure 1394 Clock

NG OK

Change NG X‟tal /CLK Gen. Component NG

OK

Change NG Component /Fix any trace open

Check 1394 Signals TPA0+/TPA0- , TPB0+/TPB0-

Use multi-meter to measure 1394 signals

NG Finish

Change IEEE 1394 Controller Chip

Repair Flow Chart-(2) 1394 ID Address Error

Re-write 1394 ID and check ID number is available ?

Visual Inspection check EEPROM/Connector/connection components is no damage

Change NG Component/ Fix any trace open

OK

NG

Check EEPROM Voltage

Check EEPORM Voltage, +3V

Change NG Component/ Fix any trace open

OK

NG Use multi-meter to measure EEPROM signal

Check EEPORM Signals, 1394_SCL,1394_SDA

Change NG Component/ Fix any trace open NG

Change EEPROM Chip

Finished

OK

Repair Technique-Visual Inspection CID

Visual Inspection to check 1394 connector, controller & related component is not damaged. 1-1

CID

1-2

Repair Technique-Check Bios setting

Check 1394 setting is Unlock in the Bios.

2

Repair Technique-Measure Voltage

3 Measure IEEE 1394 controller voltages: (RICOH R5C841) Pin : +3V

Repair Technique-Measure 1394 Clock Use Oscilloscope to check

1:1394 X‟TAL 24.576Mhz 2:33.3Mhz (PCI_CLK) are ok.

4

Repair Technique-Measure 1394 Signals Use Multi-Meter to measure 1394 signals bias voltage value. TPA0+/TPA0- ,TPB0+/TPB0- (Fig. 5-2).

Test Pin

GND

5-1

TPB0-

If still cannot find any abnormal please try to change 1394 controller and check other device under PCI bus.

TPA0-

TPB0+ TPA0+

5-2

If the problem is still existing after change 1394 controller, please change SB at last.

Repair Technique-Diode Value 1394 Pin

TPB0-

TPA0-

TPB0+ TPA0+

6

Repair Technique-Diode Value EEPROM

1394_SCL 1394_SDA

7

Chapter 13 Card Reader Repair Guide

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +3V

+VCC A CD CMD CE#

SB

DA0~DA3

PCI BUS

SDCLK/MSCLK

CLK_CBPCI (33MHZ)

X‟TAL

24.576MHZ

CD  Card Detect CMD  Comm和 WE#  Write Enable CE#  Card Enable CLK  Clock PC  Power 控制 WP  Write Protect DA0~3  Data 0~3

Circuit-1

Circuit-2

Repair Flow Chart Start 1.Visual Inspection 2.Check Connector & Pins is OK ?

Change Defect Component & Re-solder

Confirm the problem Is MMC/SD error or MS/MS-pro error Measure Voltage, VCCA = +3V is OK (Control signal MCVCC3EN# is Low active)

Change Defect Component

Change Defect Component

Change Defect Component

Measure clock, Check related Resister 0 ohm

Check Resister and Capacitor and MOS-FET

Check Voltage is OK ?

Check MSCLK/SDCLK is OK ?

Use multi-meter to measure Check DATA0~ DATA3(CD) & CMD signal is OK ?

Change Card reader Controller Chip Finish

Repair Technique-Visual Inspection 1

Pin bend

Visual Inspection: 1.check Card Reader connector is no damaged and bend.

2 Check MSCLK & SDCLK: 1.Use multi-meter to measure MSCLK & SDCLK Pin(24) is correct

GND

Repair Technique-Check VCC & CMD 3 Check VCC(3V) 1.Use multi-meter to measure VCCA Pin(14,19,26)is correct

GND

4 Check CMD 1.Use multi-meter to measure CMD Pin(23)is correct

GND

Repair Technique-DATA0~3 5

Check DATA 0~3 1.If memory type is disordered or data transfer fail please Use multi-meter to measure DATA0~ 3

GND

GND

Pin13 -> DATA0 Pin11 -> DATA1 Pin27 -> DATA2 Pin25 -> DATA3

Repair Technique-Diode Value of Card Reader Pin Signal Name

PIN 6 3 4

5

8

7

2

1

9

28

Diode Value

PIN

Signal Name

Diode Value

1

GND

0

17

SDCLK/MSCLK

492

2

GND

0

18

SMCD1

503

3

GND

0

19

VCCA

596

4

GND

0

20

MSCD#

598

5

GND

0

21

GND

6

SD_WP

OL

22

SMCD0

503

7

NC

OL

23

SDCMD

496

8

NC

OL

24

SDCLK/MSCLK

492

9

FUNCSEL0

497

25

SDDATA3

498

10

GND

0

26

VCCA

596

11

SDDATA1

497

27

SDDATA2

498

12

SMCD3

503

28

GND

13

SDDATA0

497

14

VCCA

596

15

GND

16

SMCD2

0 503

0

0

Card Reader AU6433

USB Interface

To Connector

N53SV not support XD

CR Schematic 48Mhz Clock to PCH

POWER

Repair Skill • Check BIOS is locked or not, driver is updated to the latest version. • 2.Check Connector have dirt or bad connection => AU6433 IC • How to check AU6433 IC is normally – Each POWER’s voltage levels – CLOCK voltage levels and frquence – Chip Reset pin pusj to HIGH to 3.3Volt

Chapter 14 SATA Repair Guide

Overview  Diagram  Theorem  Q & A (Repair Experience)

Diagram Clock GEN CLK_SATA_ICH

SATA HDD

SATA BUS

SB

Circuit

SATA HDD

South Bridge

ODD&HDD架構 • HM65 has total 6 SATA ports – 2 SATA 6 Gb/s (port 0、1) – 4 SATA 3 Gb/s (port 2、3、4、5)

SATA Port0

SATA HDD

SATA Port2

SATA ODD

HDD Schematic To PCH

+5V POWER

Repair Flow Chart Start Visual Inspection/ Check Connector & Pins is OK ?

Change Defect Component & Re-solder

OK

NG Check BIOS set up and Update latest BIOS version

Load BIOS set up default/ update bios to latest version

OK

NG OK Check SATA VCC is OK ?

Check Power+5VS & +3VScircuit

Change Defect Component NG OK Change Defect Component

Check CLK_SATA_ICH is ok?

NG OK Check SATA pin Diode is OK ?

Finish

Change Defect Component

Chapter 15 ODD Repair Guide

Chapter 15  Diagram  Theorem  Repair Flow Chart  Q & A (Repair Experience)

Diagram Clock GEN CLK_SATA_ICH

S.B

IDE BUS SATA BUS ODD 接口 ODD M/B

SB

Circuit

ODD Schematic +5V POWER POWER Enable Low Active

To PCH

For ZPODD use

ZPODD Introduction • Zero Power ODD (ZPODD): When the ODD idle will automatically power off until the user to use the ODD, it will power on the mechanism 。 – Required with BIOS, ODD, and MB H / W can be Support – Default idle 1min after the power was automatically cut

– CD-ROM disc or a disc out within the ODD does not cut

power.

Repair Skill • 1.Check BIOS have Lock ODD, BIOS is updated to the latest version, SATA Controller Driver for updates to the latest version.

• 2.Check Connector have dirt or bad connection => 5V Power

• 3.Check SATA signal

Introduction • SATA Controller driver

Repair Flow Chart Start

Visual Inspection to check Connector is no damaged, Soldering is ok.

Change NG connector, re-solder NG soldering point, Change new CD/DVD-ROM FPC

OK

NG Load set up default in the bios/ update bios to latest version

Load setup default and update to latest bios.

OK

NG Measure ODD Voltage

Check ODD Vcc Voltage : Vcc=+5V

Confirm the circuit, Change NG component

OK

NG OK Check CLK_SATA_ICH is ok?

Change Defect Component NG

Use multi-meter to measure ODD signal‟s diode value, compare with good MB.

Change S.B

Finished

Chapter 16 LAN Repair Guide

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +2.5V_LAN +3V_LAN

PCI_Reset #

Clock :

1.25MHz 2.CLK_LANPCI

PCI_BUS

SB

LAN 控制 IC

Transformer 10/100MB RTL 8100CL

SMBus

+3V_LAN EEPROM

Diagram

Theorem-EEPROM Pin Pinout

93C46

What is MAC Address?  Each device connected to a st和ard LAN needs a Data Link Layer address (or called hardware address), providing a means of unique identification.  Each NIC has its unique, hard-coded MAC (Media Access 控制) address. It is a 48 bits (6 bytes) address written in a hexadecimal format. The first 3 bytes represents for vendor ID 和 the remaining 3 bytes are serial number.

MAC: 000C6E 7D3D0F Vender ID

Serial Number

Repair Flow Chart-(1) START

Visual Inspection Check LAN Connector and Component is OK ?

Change Defect Connector/Component Can Write LAN ID ?

Check LAN MAC ID address/ BIOS setting up

Fail

OK Re-write LAN ID Address /Load BIOS default

OK

LAN ID Error

Next Page

NG Check Lan Voltage, +3V_LAN,+2.5V_LAN…

Measure LAN Voltage

OK

Confirm the circuit, Change Defect connection R,L,C or Transistor Components.

OK

NG

Check Lan X‟tal 25MHz, CLK_LanPCI 33MHz ,PCI_RST#

Measure LAN Clock & RST#

Change NG X‟tal/Clock Gen.

OK

NG Use multi-meter, to measure signal is 150 ohm ? LAN_RDP/RDN & LAN_TDP/TDN

Measure LAN Transformer

Change NG Transformer /Related R.C Component Fix any trace open

OK

NG Use multi-meter to measure PCI_Bus AD signals AD0~AD31

Measure LAN AD signals

Fix any trace open/ Check NG device on PCI_Bus NG

Change LAN Controller Chip OK

NG

Change S.B Finished

OK

Repair Flow Chart-(2) LAN ID Error

Re-write LAN ID and check ID number is available ?

Change NG Component/ Fix any trace open

Visual Inspection the EEPROM and related components is OK ?

OK

NG

Check Power to EEPROM VCC pin Connection or Trace is OK .

Check EEPROM VCC(+3V) is OK ?

OK

NG

Use multi-meter to measure SEEDI/SEECLK/SEECS signal

Check EEPROM to LAN Controller Trace is open?

OK Repair Defect open Trace NG

Change EEPROM Chip

Finish

Repair Technique-Visual Inspection CID

Visual Inspection to check 1.LAN(RJ-45) Connector/Pin is OK. 2.Related components is no miss and damage or burned

1-1

CID

1-2

Repair Technique-Check Bios setting

Check LAN port setting is UNLOCKED mode in the BIOS.

2

Repair Technique-LAN ID Check

LAN MAC ID

3 Check LAN MAC ID address is correct/available (Not 000000 000000) If LAN MAC ID fail, Please Re-write LAN MAC address first. If the problem still exist, check Voltage is OK and then use multi-meter to measure diode value of EEPROM

Repair Technique-Measure Voltage & CLK 4-1

+2.5V_LAN

1: +3V_LAN

PCI_Reset#

+3V_LAN

Measure LAN controller voltages & CLK:

2: +2.5V_LAN

LAN 控制 IC

3: 25MHz

Clock :

4: PCI_Reset#

25MHz & CLK_LANPCI

5: CLK_LANPCI (33MHz)

4-2 Measure EEPROM voltages: +3V_LAN

Pin 8: +3V_LAN Pin 5: GND

93C46

Repair Technique-Measure Transformer Signals(1) Use Multi-Meter Transformer signals.

to

measure

Some signals should be connected together (Show as Fig.5-2, the signals marked Green color) If Transformer NG, please change it . 5-1

TDP TDN

LAN_TX+ LAN_TX-

RDP RDN

LAN_RX+ LAN_RX-

5-2

Repair Technique-Measure Transformer Signals(2) Use Multi-Meter to measure Transformer signals. TX‟ signals and RX‟ signals should be 150 diode value (Show as Fig.6-2, the signals marked black color)

6-1

TDP TDN

LAN_TX+ LAN_TX-

RDP RDN

LAN_RX+ LAN_RX-

6-2

If NG , Please confirm related Resistor (75 ohm) component.

Repair Technique-Diode Value EEPROM

93C46

Chapter 17 VGA Repair Guide

Overview  Diagram  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +3VS

PIN1

RED

PIN2

NB

GREEN PIN3

BLUE

DDCDA

PIN12

HSYNC

PIN13

VSYNC

PIN14

DDCCL

PIN15

+12VS

Signal Description 1

~ 6 11

5 10 ~ 15

Repair Flow Chart-(1) Start 1.Visual Inspection 2.Check Connector & Pins is OK ?

Change Defect Component & Re-solder

OK

NG Confirm the problem Is color error or No display

CRT Color error

OK

CRT No display/Other problem

Clear CMOS and Load Default or Update new Bios

Clear CMOS/ Bios check NG

Next Page OK Change Defect Component NG

Check MOS +12VS is OK Check HSYNC/VSYNC(+3.3V) is OK Check DDCDA(+3.3V)/DDCL(+5V) is OK (plug in CRT Connector)

Check Voltage is OK ?

OK Change Defect Component

Check Resister and Capacitor and MOS-FET

Use multi-meter to measure Check HSYNC/VSYNC/DDCDA/DDCCL signal is OK ?

NG

Change North Bridge or Graphics Chip Finish

Repair Flow Chart-(2) Start 1.Visual Inspection 2.Check Connector & Pins is OK ?

CRT Color error

Check diode Voltage is OK ?

Confirm the problem Is color error or No display

Check Diode of +3VS is OK

OK Change Defect Component NG

Use multi-meter to measure Check R/G/B signal is OK ?

Change Defect Diode and RLC Component NG

Change North Bridge/VGA

Finish

OK

Repair Technique-Visual Inspection CID接口 bend

1-1

Visual Inspection: 1.check VGA connector is no damaged and bend.

2.Be sure VGA connector Pin Solder no open or short.

1-2

CID

Repair Technique-Clear CMOS / Check Bios 2

If CRT is no display, please clear CMOS and load Bios default at first. And then, If problem still exist, please try to change Bios or update Bios.

Repair Technique-Measure VGA signals GND

3-1 Check the problem belongs to (i) RGB color error problem (ii) No display or display error problem. (i)

test point

3-2 Pin 5,10,14,3,8,12,1,6

Pin 15,4,9,13,2,7,11

RGB color error problem please use multi-meter to measure which color (R.G.B.) signal is error. Trace the connection to confirm related inductor or capacitor is ok. If it‟s not caused by R.L.C.Q. small components please change NB or Graphics Chip.

(ii) No display or display error (not included color error). Use the meter to measure Diode value on DDCCL &DDCDA, VSYNC & HSYNC. Trace the connection to confirm related R.C.L.Q. is ok. If all check items are no problem please change NB or Graphics Chip

Repair Technique-Diode Value of VGA Pin Pin Name

Pin 5,10,14,3,8,12,1,6

Pin 15,4,9,13,2,7,11

4

Diode Value

Pin Name

Diode Value

VGA basics (1) • RGB, HSYNC, VSYNC

VGA basics (2) • CRT monitor detection – RGB

Monitor

R/G/B out (37.5ohm) (trace imp.)

(50ohm) (trace imp.)

PCH 150ohm

150ohm

75ohm

Signal description (PCH)

Analog RGB

Sync

DDC

Block diagram MB RGB

PCH

DDC CLK/DAT

VGA_HSYNC VGA_VSYNC

D-sub connector

PIN

Description

1

RED

2

GREEN

3

BLUE

4

NC

5

GND

6

GND-R

7

GND-G

8

GND-B

9

NC

10

GND

11

NC

12

DDC DATA

13

H-Sync

14

V-Sync

15

DDC CLOCK

Schematic DDC

R/G/B with PI filter

HSYNC/VSYNC with buffer IC

D_SUB Conn.

Debug Tips • Common issues: – CRT can not be detected (Fn+F8 cannot find the monitor) • Exchange monitor to verify • Check resistance: – RGB connector side (with monitor): 37.5ohm – RGB connector side (without monitor): 75ohm

– Abnormal / No display • Check PCH DAC power VccADAC • Check RGB/Hsync/Vsync connection and related components (buffer IC, beads, PCH) – Screen blinking Hsync/Vsync – Overall color abnormal RGB

– Abnormal Resolution • Check DDC

Chapter 18 LCD Repair Guide

Overview  Diagram  Signal Description  Theorem  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram-1 System Board Side

LCD Module Side +3Vs Display panel

GMCH LCD_ENVDD

LVDS FFC LVDS Bus LVDS 接口

LCD_ENBACK LCD_BACK_ADJ ADJ_BL

BACK_OFF#

Cable

LID_RSM#

Inverter Board Inverter board 接口

SB KBC

LID Switch

AC_BAT_SYS

Diagram-2 System Board Side +3Vs

Display panel

ATI VGA AGP Bus/ PCI-Express

LCD Module Side

LCD_ENVDD

LVDS

FFC

LVDS Bus LVDS 接口

MCH

LCD_ENBACK ADJ_BL

Cable

BACK_OFF#

Inverter Board

LID_RSM#

Inverter board 接口

SB KBC

LID Switch

AC_BAT_SYS

Circuit-1 GMCH

Circuit-2 LVDS 接口

Circuit-3

Inverter board 接口

Signal Define-1

Signal Define-2

Signal Define-3

Repair Flow Chart(1) Start Visual Inspection Check connector and related component are no damage

Change damaged Connector & any N.G RLC components

OK

NG Check / Clear CMOS BIOS setting &Fn key problem

1.Clear CMOS and Load Default 2.Check Fn + F5 or F6….etc. (depend on model request) NG

Separate the symptom problem

LCD display too Dark

1

LCD No display/turn to white

2 Finish

LCD display abnormal

3

OK

Repair Flow Chart(2) Start1

LCD display too Dark Measure Inverter Con. Voltage

Check AC_BAT_SYS signal= is 19V.

Change any NG related L&C Component

OK

NG

Measure Inverter Connector Control signal

Change North Bridge or Graphics Chip

1.Check “BACK_OFF#” , Voltage = 3V (from S.B) 2.Check “LCD_ENBACK” , Voltage = 3V (from N.B or Graphic) 3.Check “LID_RSM#” , Voltage = 3V 4.Check KBC “ADJ_BL” , Voltage = between 0~3V (from KBC) (depend on model different)

Finish

Trace the related circuit, Change any NG related RLC Component and control IC NG

OK

Repair Flow Chart(3) Start2

LCD No display/turn to white Measure LVDS Con. Voltage

Check LVDS connector Voltage, +3Vs

Change any NG related R&C Component

OK

NG

Measure LVDS Voltage LCD_VCC

Check LVDS Voltage LCD_VCC, LCD_VCC =+3V And check control signal voltage, LCD_ENVDD = +3V (signal from NB or Graphic IC)

Trace LCD_VCC signal‟s related circuit, Change NG RLC and MOSIC Component NG

Change North Bridge or Graphics Chip Finish

OK

Repair Flow Chart(4) Start3

LCD display abnormal Measure Voltage

Measure Clock

Use multi-meter to measure LVDS signal is OK ?

Change North Bridge or Graphics Chip

Check LVDS Voltage ( GMCH / Gfx ), +2.5V Check VGA Core Voltage ( GMCH / Gfx ), +1.5V or +1.05V / ATi_Vcore 1.0~1.2V (depend on RD design request) AGP / PCI-E: Check LVDS Clock for GMCH, 1.DREFCLK(#) 48MHz 2.DREFCLK(#) 96MHz Check LVDS Clock for Gfx, 1.CLK_MCH66/AGP66 66MHz 2.CLK_PCIE_PEG(#) 100MHz Check LVDS Data, LADATAP[0:2] & LADATAN[0:2] Check LVDS Clock, LACLKP & LACLKN

Finish

Change any NG related R&C Component

OK

NG

Change any NG RLC Component or CLK Gen./ Fix any trace open

OK

NG

Change NG GMCH or Gfx IC/ Fix any trace open NG

OK

Repair Technique-Visual Inspection Visual Inspection 1.check Inverter/LVDS connector is no NG or BAD solder 2.R.L.C. components & Trace is no damage or miss or open

Inverter 接口 LVDS 接口

1-1

CID

1-2

Repair Technique-Check Bios setting Check BIOS Setting: 1.Check display mode is OK, not only CRT mode 2.Load BIOS default setting and test again

2-1

2-2

Repair Technique-Check Fn Key Check Fn Key Setting:

+ 3-1

+ 3-2

1.Fn + F5 is brightness Down 2.Fn + F6 is brightness Up 3.Fn + F7 is LCD Back Light On/Off 4.Fn + F8 is LCD/CRT/TV Mode switching (all function key is depend on designer)

Repair Technique-Measure Voltage(1) Use Multi-Meter or Oscilloscope to measure Voltage: 1.If problem is LCD too Dark, Check AC_BAT_SYS (on Inverter Con.) signal = 19V 4-1 2.If problem is LCD No display or turn white Check LCD_VCC (LVDS Con.) signal = 3.3V

4-2

Repair Technique-Measure Voltage(2) Use Multi-Meter or Oscilloscope to measure Voltage: 3.If problem is LCD display abnormal, .Check LVDS voltage = 2.5V 二.Check VGA Core voltage = GMCH: 1.5V or 1.05V Gfx: ATi_Vcore 1.0 ~ 1.2V 一

5

Repair Technique-Measure Control Signal Use Multi-Meter or Oscilloscope to measure Control Signal voltage:

6

1.If problem is LCD too Dark Check BACK_OFF# = 3.3V Check LCD_ENBACK =3.3V Check LID_RSM# =3.3V Check ADJ_BL =0~3V 2.If problem is LCD No display or turn white Check LCD_ENVDD =3.3V

Repair Technique-Measure CLK Use Oscilloscope to measure Clock: GMCH platform: DREFCLK(#) = 48MHz (AGP Bus) DREFCLK(#) = 96MHz (PCI-E Bus) Gfx platform: 7-1

CLK_MCH66/AGP66 = 66MHz (AGP Bus) CLK_PCIE_PEG(#) = 100 MHz (PCI-E Bus)

7-2 96MHz

Repair Technique-Measure LCDS signals Use multi-meter to measure LVDS Con. Pin signal is correct of Diode value and compare with GOOD M/B. Check LCDS Data signals, LADATAP[0:2] 8

LADATAN[0:2] Check LCDS Clock signals, LACLKP / LACLKN

Repair Technique-Diode of LVDS Signal LVDS Connector Signal Signal Name

Diode Value

L1_TX0+

443

L1_TX1+

442

L1_TX2+

443

L1_TX0-

443

L1_TX1-

442

L1_TX2-

443

LACLKP

L1_TXC+

441

LACLKN

L1_TXC-

441

LADATAP[0:2]

LADATAN[0:2]

Ps (short for) : LADATAP[0:2] / LADATAN[0:2] L: LVDS A: LVDS channel A Data output P: positive N: negative

LVDS basics • LVDS (Low-voltage differential signaling ) – Small current (3.5mA) through 100ohm

+/-350mV

Signal description (PCH)

LVDS EDID: read panel information

Panel power and backlight control

Block diagram MB

+3Vs

LCD panel

LVDS

PCH Cable

EDID CLK/DAT L_BKLTCTL L_VDD_EN

LCD connector

L_BKLTEN

LID_SW#

EC

LID Switch

AC_BAT_SYS

Schematic (1) • +LED_VCC: – LED power supply (7~20V)

• +3VS_LCD: – LVDS 3.3V power

Schematic (2) • BUF_PLT_RST#: – Platform reset signal from PCH

• LCD_BACKEN_PCH: – BL enable from PCH

• LCD_BACKOFF#: – BL enable from EC

• LID_SW#: – LID switch from HALL sensor IC

• L_BKLTCTL_PCH: – BL PWM control signal from PCH

• L_VDDEN_PCH: – LVDS 3.3V power enable

Debug Tips (1) • Keyboard Function key: – – – –

Fn + F5: back light ↓ Fn + F6: back light ↑ Fn + F7: back light ON/OFF Fn + F8: LCD/CRT/HDMI mode

+

+

Debug Tips (2) • Common issues: – Check cable and Panel first – Abnormal display • Check LVDS connection and PCH – No display • White screen – Only backlight, no LVDS signal check LVDS » Check PCH VccALVDS and VccTXLVDS » Check +3VS_LCD (power enable circuit)

• Black screen: – Check power – No backlight, but display is OK (EC, PCH, LID switch)

– Abnormal Resolution • Check EDID connection

check “backlight enable” circuits

Chapter 19 BIOS Repair Guide

Overview  Diagram  Signal Description  Introduction  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram +3VS

Clock Gen.

Cloc k

BIOS

LPC Bus LAD[0~3]

PCIRST# INIT# L架构# DIS_SYSBIOS#

SIO

SB

Circuit

Signal Description-(1)

Signal Description-(2)

Signal Description-(3)

Signal Description-(4)

Introduction  Memory Map  SST 49XXX series Block Diagram  Theorem

49xxx - Block Diagram

49xxx – Pin/Signal Names-1

49xxx – Pin/Signal Names-2

49xxx – Reset-1

FWH Mode

49xxx – Reset-2

PP Mode

49xxx – Chip Read

49xxx – Chip Write

49xxx – Block Erase

49xxx – Chip Erase

Product Ordering Information

SPI ROM

W25Q32BV:32Mbit/4MByte

You can use SPIROM BIOS’s MFGID to determine XXXNAS.2XX 2MByte BIOS XXXNF1.2XX 4MByte 4M BIOS can be burnt Inside the SPIROM of 8m All right! !! But can't start the machine Because can not recognize ME FW

The signal amount is examined for SPI SI/SO at start the boot in the instant

SPI_SO SPI_SI

Often meet the question ,user update bios to fail and not boot. CPU_RST#???

Repair Flow Chart Start 1.Visual Inspection 2.Use external Bios Boot up

1.Change Defect Component &Re-solder 2.Update Bios image file

Confirm circuit of Power IC, Check Power signal VDD(+3VS)

Check connection RLC/diode

Change Defect Component

Components Check CLK signal CLK(33MHZ)

1.Check Reset signal RST# 2.Check Control signal LFRAME#/INIT# DIS_SYSBIOS#

Measure LPC LAD[0~3] signal diode value is OK

1.Confirm circuit of CLK Gen.

Change Defect Component

Confirm related circuit, Check Resister and Capacitor and MOS-FET

Change Defect Component

1.Confirm PCB Trace

Fix any trace open

Change BIOS Chip / South Bridge

Finish

Repair Technique-Visual Inspection 1-1

外部 BIOS

1-2

Visual Inspection 1.check BIOS pins is open or short

Use External BIOS Boot up 1.If External BIOS can Boot up computer ,we can try to update BIOS image file first Jump Setting : 1. 2.

3.

4.

on off on off --- Boot from debug card off off on off --- Boot from M/B on off off off --- Update M/B Bios From Debug Card

Repair Technique-Measure Voltage VDD 1 32

2 27

VDD

25

VDD

Check VDD Voltage: Check BIOS VDD(+3VS) Voltage : Pin 1 : +3V Pin 25: +3V Pin 27: +3V Pin 32: +3V

31

CLK

3

Check CLK Frequency Check BIOS CLK Frequency: Pin 31: 33MHZ

RST#

Repair Technique-Measure BIOS Signal Measure BIOS Controller Signal:

2

4

Pin 2 : RST# Pin 11: DIS_SYSBIOS#

DIS_SYSBIOS#

24 23

11

INIT# L架构#

Pin 23: LFRAME#

Pin 24: INIT#

5

Measure BIOS Pin signal of Diode value is normal or not? Pin 13: LAD[0] Pin 14: LAD[1]

14 15

17

Pin 15: LAD[2]

LAD[3]

13

LAD[1] LAD[2]

LAD[0]

Pin 17: LAD[3]

Repair Technique-Diode Value of BIOS Pin Signal Name

PIN 4

3

2

1

32 31 30

Diode Value

PIN

Signal Name

Diode Value

1

VPP

431

17

LAD3

690

2

RST#

778

18

NC

OL

3

FPG13

OL

19

NC

OL

5

29

6

28

4

FPG12

OL

20

NC

OL

7

27

5

FPG11

OL

21

NC

OL

8

26

6

FPG10

OL

22

NC

OL

9

25

7

WP#

807

23

LFRAME#

683

10

24

8

TBL#

807

24

INIT#

607

11

23

9

NC

OL

25

VCC

431

12

22

10

NC

OL

26

GND

0

13

21

11

DIS_SYSBIOS#

OL

27

VCC

431

12

NC

OL

28

GND

0

13

LAD0

690

29

IC

OL

14

LAD1

690

30

FPG14

OL

15

LAD2

690

31

CLK

758

16

GND

0

32

VCC

431

14 15 16 17 18 19

20

Chapter 20 MEMORY Repair Guide

Overview  Diagram  Introduction 1.DDR 2.DDRII 3.DDR3  Signal Description  Repair Flow Chart  Repair Technique  Q & A (Repair Experience)

Diagram(1) NB

Memory Module (DDR) GMCH /MCH

Memory Bus

MA0~13 MD0~63 +2.5V ( for DDR )

CLK Gen.

Main Clock Gen.

+1.25Vs (for DDR )

CLK Gen.

DDR Clock Gen.

Diagram(2) N.B

Memory Module (DDR, DDR2) GMCH /MCH

Memory Bus

MA0~13 MD0~63 +1.8V ( for DDR2 ) +0.9Vs ( for DDR2 ) +2.5V ( for DDR ) +1.25Vs (for DDR )

CLK Gen.

Main Clock Gen.

Diagram(3) N.B

Memory Module (SDR) GMCH /MCH

Memory Bus

MA0~13 MD0~63 +1.5Vs ( for DDR3 )

CLK Gen.

Main Clock Gen.

CLK Gen.

DDR Clock Gen.

DDR I vs DDR II

DDR3

Memory Type 



200 pins

DDR SO-DIMM 200 pins

200 pins

DDR2 SO-DIMM 200 pins

204Pin

 Micro-DIMM 

172 pin



214 pin

DDR3 1333 SO-DIMM 204Pin

Micro DDR-DIMM 172 pins Micro DDR2-DIMM 214 pins

DDR vs. DDR II DDR

DDR II

Frequency Specs 200/266/333/400 Mbps*

400/533/(667) Mbps*

Bus Frequency

100/133/166/200 MHz

200/266/(333) MHz

DRAM Core Frequency

100/133/166/200 MHz

100/133/(166) MHz

Prefetch Size

2 bit

4 bit

Burst Length

2/4/8

4/8**

Data Strobe

Single DQS

Differential Strobe: DQS, /DQS***

CAS Latency

1.5, 2, 2.5

3+, 4, 5

Write Latency

1T

Read Latency-1

Data Rate

DDR vs. DDR II count. Power Specs Core Voltage (VDD) 2.5V++

1.8V

I/O Voltage (VDDQ) SSTL_2 (2.5V)

SSTL_1.8 (1.8V)

Format Packaging

TSOP (II), TBGA

FBGA

Compatibility With DDR I Command Set

Same as DDR I

Basic Timing Parameters

Same as DDR I Bus Utilization and signal Integrity

New fearture

ODT OCD-calibration Posted CAS Additive Latency+++

Dual Channel  The two channels handle memory-processing more efficiently by utilizing the theoretical bandwidth of the two modules, thus reducing system latencies, the timing delays that inherently occur with one memory module.

Rules to Enable Dual Channel Mode

    

Matched DIMM configuration in each channel Same Density (128MB, 256MB, 512MB, etc.) Same DRAM technology (128Mb, 256Mb, or 512Mb) Same DRAM bus width (x8 or x16) All either single-sided or dual-sided

DDR2 Electrical Interface  Double Data Rate II IC's use 1.8 volt SSTL_18 compatible I/O [class II], how ever the supply voltage may be higher. SSTL-18: Stub Series Terminated Logic for 1.8v [JESD 8-15A]. Class II provides for higher power dissipation, Higher drive and a maximum current of 15.2mA

DDR2 Termination  DDR2 modules contain the require resistor termination located on the memory chips using a technique called On-Die Termination [ODT]. While DDR1 modules have the necessary resistive termination located on the motherboard. Using ODT, DDR2 are able to reduce the parts count required for mother board while at the same time locate the terminations closer the the signal destination. The ODT termination can be turned on or off by the DRAM controller. Normally the terminations are turned on for Writes and disable for Reads. The value of the ODT termination is selectable based on the number of modules in the system. With one DIMM module the ODT value is set at 150 ohms [300W pull-up and 300W pull-down]. When two modules are loaded into the system the ODT value is exchanged to 75 ohms [150W pull-up and 150W pull-down] for the DIMM not being written to while the DIMM being accessed has its ODT turned off. Writing to the Extended Mode Register [EMR] controls the ODT presence and value. Three combinations are allowed; termination disabled, 75 ohms, and 150 ohms [ also 50 ohms]. The newest revision adds 50 ohm termination values. ODT improves the eye-structure over SSTL for either Single-Rank or Dual-Rank modules.

DDR 3

DDR 3  DDR3 SDRAM(Double Data Rate Three Synchronous Dynamic Random Access Memory)  DDR3 SDRAM improves on DDR2 SDRAM in several significant ways: 1.Higher bandwidth due to increased clock rate 2.Reduced power consumption due to 90nm fabrication technology 3.Pre-fetch buffer is doubled to 8 bits to further increase performance 4.The voltage of DDR3 SDRAM DIMM's was lowered from 1.8V to 1.5V. This reduces power consumption and heat generation, as well as enabling more dense memory configurations for higher capacities.

Standard DDR3 SDRAM DIMM's

DDR 3 Top

DDR 3 Bottom

Memory • I7 CPU(2820QM、2720QM) can support 2 pcs 1600Mhz DIMM. • 4 pcs DIMM only support 1333Mhz DIMM.

• Qual Core CPU need use A1、B1 ，Dual Core CPU need use A0、B0。

Memory POWER +3V

Introduction

+1.5 Volt +0.75 Volt

+0.75 Volt

Introduction

Memory Clock 667Mhz

Repair skill • General repair rule: – Check the specific DIMM have problem or not. – Check some slot have problems or not. – Check Connector have dirt or bad soldering (using the macro mode)。 – .Check POWER and CLOCK level and frequency – If it’s Memory issue，use MT420 memory test program to test。

Repair Flow Chart Start

Visual Inspection check memory slot is no bent pin or damaged.

OK

Change any damaged memory slot or component/ Fix any bad solder or trace open NG

Measure memory Voltage

Check Memory Voltage, 1.8V or 2.5V or 1.5V (depend on Memory type) Check Memory Vtt Voltage, 0.9Vs or 1.25Vs (depend on Memory type)

Fix any voltage regulator IC or related RLC component, Fix any trace open NG

Measure memory Clock

Check Memory Clock, 100 / 133 / 166 …MHz

Confirm the circuit, Fix any trace or RLC damaged/ change NG CLK Generator

OK

NG Measure memory Data /Address signals and control signals ,RAS#,CAS#,WE#

Use Multi-Meter to measure, Trace NG signals and compare with good MB

Fix any trace open or resistor damaged NG

Change N.B Finish

OK

OK

Repair Technique-Visual Inspection Visual Inspection 1.Check memory slot / Pin is not damaged or bent pin inside. CID

2.Check related resistor , capacitor component no damage. 3.Fix any trace open or BAD solder 1-1

CID

1-2

Repair Technique-Measure Memory Voltage Use Multi-Meter or Oscilloscope to measure Memory Voltage & Vtt Voltage .

DDR Vtt Voltage =2.5V

2-1

DDR Vtt Voltage =1.25V

Memory Voltage: SDRAM: 3Vs DDR :2.5V DDR2: 1.8V Memory Vtt Voltage: DDR :1.25Vs DDR2: 0.9Vs

2-2

Repair Technique-Measure Memory Clock Use Oscilloscope to measure Memory Clock (100Mhz,133Mhz,166Mhz…depends on different chipset & memory)

3-1

Memory CLK= 100,133,166…MHz

3-2

Repair Technique-Measure Memory Signals Plug Memory measure card into slot. Use Multi-Meter to measure memory signals‟ bias voltage value. Compare with good MB if you find any unusual.

Diode Mode

4

Chapter 21 POST CODE Repair Guide

Overview  What is POST CODE  Using POST Code to Debug  Appendix: (1)BIOS CODE Definition (2)BIOS Beep Code  Q & A (Repair Experience)

What is POST Code  POST : Power On Self Test 

The tag thrown out by BIOS – Usually, BIOS would output some number through 80ports. Using I/O access card (debug card), user could read those number. – The POST codes used by Award, Phoenix, and AMI are different. – These numbers mean something was executing in the system.

What is POST Code  POST Code as BIOS executing process 



Standard POST Code – These numbers were used as standard process. BIOS Debug Code – These numbers depend on various project.

POST “00”, “FF” POST Code “00”,”FF” or Debug card shows all dots(……) / all 00 (1)Check Voltage: a.) Vcore ,if no Vcore check from power block circuit diagram b.) 1.5v,if no 1.5v check from power block circuit diagram c.) 2.5v,if no 2.5v check from power block circuit diagram d.) 3.3v,if no 3.3v check from power block circuit diagram e.) check for N/B,S/B voltage is ok or not (2)Check CLK: a.) CPU CLK,if no CPU CLK check from CLK gen. circuit diagram b.) N/B CLK,if no N/B CLK check from CLK gen. circuit diagram c.) S/B CLK,if no S/B CLK check from CLK gen. circuit diagram d.) 14.318MHz,if no 14.318MHz check from CLK gen. circuit diagram e.) CLK generator. if all no CLK,change 14.318MHz,and then change CLK gen. Before must check any open or short

(3)Check Power ok & Reset a.) H/W reset,if low voltage check circuit diagram, normal is capacitor bad b.) power supply power ok,if low voltage,normal is capacitor bad c.) CPU power ok,if low voltage check circuit diagram,and above signal d.) PCI reset,if low voltage check above signal and for S/B CLK,voltage e.) CPU reset,if low voltage check above signal and for N/B CLK,voltage f.) Check boot up sequence.

(4)Check control signal: a.) Check CPU control signal(ADS#,BRDY#…) is ok or not b.) Check PCI control signal(FRAME#,IRDY#,TRDY#…) is ok or not c.) Check others control signal is ok or not

00(no data) (1)Change BIOS (2)Check bios voltage (3)Check BIOS CLK (4)Check LAD0~3 (5)Check BIOS control signal (6)Check CPU control signal 00(Have address & data) (1)CPU N/B:HD0~63,HA3~HA31,control signal open or short (2)N/BS/B:PCI BUS(AD0~AD31,CBE0~CBE3) or HUB Link(HL0~HL10) or V_link or LDT BUS open or short (3)S/BBIOS:ISA BIOS(SA0~SA19,SD0~SD7) or LPC BUS (LAD0~LAD3) open or short

POST “C0”, “D0” C0 (Award) D0 (AMI) (1)Change BIOS (2)Check HD0~63 signal open or short (3)Check HA3~31 signal open or short (4)Check AD0~31 signal open or short (5)Check SM BUS is ok or not (6)Check all Voltage is ok or not ,especially 2.5V,3VS (7)Check all CLK is ok or not (9)Check SB, especially for Intel ICH4

POST “C1”, “9F”, “D3”, “EF”…. C1, E1, 9F, 99, Ad (Award) D3, D4, E0, E5, A4 (AMI) EF, EE, 28 (Phoenix) (1)Change BIOS (2)Check Memory voltage is ok or not, especially 3V, 2.5V, 1.8V , 1.25Vtt , 0.9Vtt (3)Check Memory CLK is ok or not (4)Check SM BUS is ok or not (5)Check MA,MD,CAS,RAS,CKE… signal is Open or Short (6)DIMM socket not clean or bad (7)Check HA,AD,CPU control signal is open or Short

POST “C3”, “C5”, “05” C3 (Award) (1)Change BIOS (2)Check memory problem (3)Check frequency problem C5 (Award) (1)Change BIOS (2)Check memory problem (3)Check HA3~31 is open or short

05 (Award) (1)Check KBC CLK is ok or not (2)Check KBC voltage is ok or not (3)Check KBC address,data,control signal is open or short (4)Change KBC

POST “0B”, “13”, “20” 0B (Award) (1)Change BIOS (2)Check battery is ok or not (3)Check all CLK signal(14.318MHz,25MHz,40MHz….) (4)Check all voltage is ok or not (5)Check INIT,TRDY#,RADY signal… is open or short (6) Check C/BE0~3 is short or not (7)Check all control signal(CPU,PCI,AGP) is open or short 13 (AMI) (1) Check 1.5V to NB 20 (AMI) (1) Check 2.5V , 1.25Vtt or 1.8V ,0.9Vtt (2) Check Memory problems (3) Check AGP signals

POST ”31”,”3D”,”41” 31,3D (Award) (1)Check KBC CLK is ok or not (2)Check K/B problem (3)Check CPU control signal(HITM#,ITIN,ITNK#…)is open or short (4)Check N/B control signal… is open or short 41 (Award) (1)Change BIOS (2)Check SA0~SA16 is Open or short (3)Check MEMR#,MEMW# is open or short (4)Check HA3~31 is open or short

POST “4E”, “61”, “85” 4E (Award)

(1)Check TRDY#,DEVSEL# is open or short (2)Check K/B problem 61 (Award) (1)Check Cache problem (2)Check CPU control signal is ok or not (3)Check N/B control signal is ok or not 85 (AMI) (1) Check Bios (2) Check NB (No display problem)

POST CODE Definition  AMI POST Code definition  AWARD POST Code definition  Phoenix POST Code definition

AMI Bios Code Definition-1

AMI Bios Code Definition-2

AMI Bios Code Definition-3

AMI Bios Code Definition-4

AMI Bios Code Definition-5

AMI Bios Code Definition-6

AMI Bios Code Definition-7

AMI Bios Code Definition-8

Award Bios Code Definition-1

Award Bios Code Definition-2

Award Bios Code Definition-3

Award Bios Code Definition-4

Award Bios Code Definition-5

Award Bios Code Definition-6

Award Bios Code Definition-7

Award Bios Code Definition-8

Award Bios Code Definition-9

Phoenix Bios Code Definition-1

Phoenix Bios Code Definition-2

Phoenix Bios Code Definition-3

Phoenix Bios Code Definition-4

Phoenix Bios Code Definition-5

Phoenix Bios Code Definition-6

Phoenix Bios Code Definition-7

Phoenix Bios Code Definition-8

Phoenix Bios Code Definition-9

BIOS Beep Codes  AMI BIOS Beep Codes  AWARD BIOS Beep Codes  Phoenix BIOS Beep Codes

BIOS Beep Codes for AMI Beeps

Error Message

Description

1 short

DRAM refresh failure

The programmable interrupt timer or programmable interrupt controller has probably failed

2 short

Memory parity error

A memory parity error has occurred in the first 64K of RAM. The RAM IC is probably bad

3 short

Base 64K memory failure

A memory failure has occurred in the first 64K of RAM. The RAM IC is probably bad

4 short

System timer failure

The system clock/timer IC has failed or there is a memory error in the first bank of memory

5 short

Processor error

The system CPU has failed

6 short

Gate A20 failure

The keyboard controller IC has failed, which is not allowing Gate A20 to switch the processor to protected mode. Replace the keyboard controller

7 short

Virtual mode processor exception error

The CPU has generated an exception error because of a fault in the CPU or motherboard circuitry

8 short

Display memory read/write error

The system video adapter is missing or defective

9 short

ROM checksum error

The contents of the system BIOS ROM does not match the expected checksum value. The BIOS ROM is probably defective and should be replaced

10 short

CMOS shutdown register read/write error

The shutdown for the CMOS has failed

11 short

Cache error

The L2 cache is faulty

1 long, 2 short

Failure in video system

An error was encountered in the video BIOS ROM, or a horizontal retrace failure has been encountered

1 long, 3 short

Memory test failure

A fault has been detected in memory above 64KB

1 long, 8 short

Display test failure

The video adapter is either missing or defective

2 short

POST Failure

One of the hardware testa have failed

1 long

POST has passed all tests

BIOS Beep Codes for AWARD Beeps

Error Message

Description

1long, 2 short

Video adapter error

Either video adapter is bad or is not seated properly. Also, check to ensure the monitor cable is connected properly.

Repeating (endless loop)

Memory error

Check for improperly seated or missing memory.

1long, 3short

No video card or bad video RAM

Reseat or replace the video card.

Overheated CPU

Check the CPU fan for proper operation. Check the case for proper air flow.

CPU

Either the CPU is not seated properly or the CPU is damaged. May also be due to excess heat. Check the CPU fan or BIOS settings for proper fan speed.

High frequency beeeps while running

Repeating High/Low

BIOS Beep Codes-1 for Phoenix 1-1-2

CPU test failure

The CPU is faulty. Replace the CPU

Low 1-1-2

System board select failure

The motherboard is having an undetermined fault. Replace the motherboard

1-1-3

CMOS read/write error

The real time clock/CMOS is faulty. Replace the CMOS if possible

Low 1-1-3

Extended CMOS RAM failure

The extended portion of the CMOS RAM has failed. Replace the CMOS if possible

1-1-4

BIOS ROM checksum error

The BIOS ROM has failed. Replace the BIOS or upgrade if possible

1-2-1

PIT failure

The programmable interrupt timer has failed. Replace if possible

1-2-2

DMA failure

The DMA controller has failed. Replace the IC if possible

1-2-3

DMA read/write failure

The DMA controller has failed. Replace the IC if possible

1-3-1

RAM refresh failure

The RAM refresh controller has failed

1-3-2

64KB RAM failure

The test of the first 64KB RAM has failed to start

1-3-3

First 64KB RAM failure

The first RAM IC has failed. Replace the IC if possible

1-3-4

First 64KB logic failure

The first RAM control logic has failed

1-4-1

Address line failure

The address line to the first 64KB RAM has failed

1-4-2

Parity RAM failure

The first RAM IC has failed. Replace if possible

1-4-3

EISA fail-safe timer test

Replace the motherboard

1-4-4

EISA NMI port 462 test

Replace the motherboard

2-1-1~4

64KB RAM failure

Bit 0~3; This data bit on the first RAM IC has failed. Replace the IC if possible

BIOS Beep Codes-2 for Phoenix 2-2-1~4

64KB RAM failure

Bit 4~7; This data bit on the first RAM IC has failed. Replace the IC if possible

2-3-1~4

64KB RAM failure

Bit 8~11; This data bit on the first RAM IC has failed. Replace the IC if possible

2-4-1~4

64KB RAM failure

Bit 12~15; This data bit on the first RAM IC has failed. Replace the IC if possible

3-1-1

Slave DMA register failure

The DMA controller has failed. Replace the controller if possible

3-1-2

Master DMA register failure

The DMA controller had failed. Replace the controller if possible

3-1-3

Master interrupt mask register failure

The interrupt controller IC has failed

3-1-4

Slave interrupt mask register failure

The interrupt controller IC has failed

3-2-2

Interrupt vector error

The BIOS was unable to load the interrupt vectors into memory. Replace the motherboard

3-2-3

Reserved

3-2-4

Keyboard controller failure

The keyboard controller has failed. Replace the IC if possible

3-3-1

CMOS RAM power bad

Replace the CMOS battery or CMOS RAM if possible

3-3-2

CMOS configuration error

The CMOS configuration has failed. Restore the configuration or replace the battery if possible

3-3-3

Reserved

3-3-4

Video memory failure

There is a problem with the video memory. Replace the video adapter if possible

3-4-1

Video initialization failure

There is a problem with the video adapter. Reseat the adapter or replace the adapter if possible

4-2-1

Timer failure

The system's timer IC has failed. Replace the IC if possible

BIOS Beep Codes-3 for Phoenix 4-2-2

Shutdown failure

The CMOS has failed. Replace the CMOS IC if possible

4-2-3

Gate A20 failure

The keyboard controller has failed. Replace the IC if possible

4-2-4

Unexpected interrupt in protected mode

This is a CPU problem. Replace the CPU and retest

4-3-1

RAM test failure

System RAM addressing circuitry is faulty. Replace the motherboard

4-3-3

Interval timer channel 2 failure

The system timer IC has failed. Replace the IC if possible

4-3-4

Time of day clock failure

The real time clock/CMOS has failed. Replace the CMOS if possible

4-4-1

Serial port failure

A error has occurred in the serial port circuitry

4-4-2

Parallel port failure

A error has occurred in the parallel port circuitry

4-4-3

Math coprocessor failure

The math coprocessor has failed. If possible, replace the MPU

Chapter 22 New Card Repair Guide

Overview Diagram Slot Circuit (G1S) New Card Power Circuit Repair Flow Chart Q & A (Repair Experience)

Diagram +1.5VS +3VS +3VSUS +3VSUS_PE

VSUS_ON SUSB_EC

Power Controller (R5538V001)

+1.5VS_PE +3VS_PE

PCIE_TXN3_C PCIE_TXP3_C

SB

PCIE_RXN3_NEWCARD PCIE_RXP3_NEWCARD

CLK_PCIE_NEWCARD

Clock Gen

CLK_PCIE_NEWCARD#

Slot Circuit (G1S)

New Card Power Circuit

Repair Flow Chart Newcard error

Measure CLK_PCIE_NEWCARD & CLK_PCIE_NEWCARD#

Check CLOCK GEN is OK

CLK is OK

Change Defect Component

OK

NG

Measure Voltage is OK ?

Check +1.5VS_PE & +3VS_PE & +3VSUS_PE is OK Check +1.5VS,+3VS,+3VSUS is OK Check VSUS_ON,SUSB_ECis OK

Change Defect Component

OK

NG

Use multi-meter to measure Check PCIE Interface signal is OK ?

Check Resister and Capacitor and Trace

Trace NG signal and Solve defect symptom NG

Change South Bridge

Finish

OK

Chapter 23 EC

EC KB3310 Role     

Power sequence control with FCH Keyboard Controller/Touchpad Fan control LCD Backlight control SMBUS  

Smart battery Temperature monitor

 Embedded Controller  

ACPI (PC power management): Sleep/hibernate/wake up/Lid switch SCI – System Control Interrupt to FCH

 GPIO: Control System Power, LED, AC/DC detect, Charge/discharge control  SPI BIOS ROM, Firmware (8051)  Watch Dog Timer