Laptop Power Sequence

LAPTOP CHIPS VOLTAGES CPU VCORE (1V Aprox 30Amp current)

2.5V (VDD) 1.25V (VTT )

Vtt CPU

1.8V (VDD) 0.9V (VTT DDR)

1.8V 3.3V

3.3V

LAN

3.3V (SPD)

1.05VCCP

1.05VCCP or 1.5v

DDR 1

MCH North bridge

5V 3.3V

DDR 2

3.3V

BIOS

5V

1.5V (VDD)

5V

DDR 3

5V

USB

AUDIO 3.3V

3.3V (SPD)

1.05VCCP

1.35V (VDD)

3.3V 5V

0.65V (VTT )

ICH South bridge

DDR 3L

3.3V

CARD READER

3.3V

CLOCK

V IN 3.3V

GFXCORE1.1V

SIO (KBC)

3.3V

THERMAL

3.3V (SPD)

LCD/ LED

CORE i3,i5,i7 3.3V

FAN

3.3V (SPD)

0.75V (VTT )

RTC

HDD

1.8V 1.5 V

GPU GFX CHIP

VCORE GFXCORE

1.05VCCP 1.5V

Core i3 CPU

5V

DVD

3.3V 1.05V 1.8V

PCH

RTC 1.5V 7

Up to C2D CPU

1

3volt VCC

(cpu) 32.7KHZ

BIOS

VR_ON PWR_ON ( main_on, Run on)

SIO

KBC_PWRBTN

3 6 5

PM_SLP_S4 susc

4

PM_SLP_S3 susb

PM_PWRBTN

RSMRST

2

SUSp_ON

3 VOLT VCC RSMRST PWRBTN

ICH

PM_PWRBTN SLP_S3 SLP_S4

POWER ON BUTTON SEQ.

(B

3volt VCC

32.7KHZ

1

Pin No 8

EC BIOS

VR_ON KBC_PWRBTN

PWR_ON

(Bridge, Ram supply)

Main on(sys on)

SIO 4 6

SUSP_ON

PM_SLP_S4 susc

5

PM_SLP_S3 susb

3 PM_PWRBTN

RSMRST

2

7

(cpu)

PCH POWER ON BUTTON SEQ.

Core i3 power sequence S W

1

S W

R304

Y1 C345

R491 R490 R503

EC SIO

R105

PCH

ITE-8518 SUS_ON RUN_ON

VR_ON

9 10

12

11

EC_PWROK HWPG

1 13 3

Core i3 VRM section

1

Vin voltage

5volt VCC

2

3

From SIO

CPU core 1 v to 1.5v

VR_ON

6

Clock enable

VRM Core v

To SIO

4

VRM power good

Core i3 CPU VID signal from CPU

6

5

GFX Core

GND 32

Power Block Diagram

230v AC

CPU Core volt

Adopter

Battery

0.8v or 1v VCORE 17

18 1

CHG_ENABLE

SM BUS

Volt In

16 13 11

Enable

SYS_ON SUSP

4

SLP_S5

3v supply

PG signal

PWRBTN

6

3VL

3.3VALWS

Step down 1

VRMPWRGD

5

5VALWS

3 RSMRST

9

PWRBTN SLP3,SLP4,

10 3 volt 19

EC_PWRGD(PWRGD)

12

5vSUS

MOSFET

PG OK

KBC

3.3vSUS

MOSFET

Enab sig

14

15

VR_ON

(SIO) 32.7khz crystal

Step down 2

2

On\off switch 8

0.9v 1.8v 1.05v

7

ICH

SUS_PWRGD

Battery

Power Block Diagram

230v AC

MAIN_PWRGD GFX_PWRGD

CPU Core volt

0.8v or 1v VCORE 18

Adopter 1

15

GFX

Volt In Step down 2 ACIN

CHG_ENABLE

SM BUS

1.8v

15

2 VR_ON

Enable

HWPG

SIO

Enab

32.7khz crystal

KBCsig

14

SUSP

19

10 Step down 1

VRMPWRGD SLP_S5

4

7

PG signal

PWRBTN

3.3VALWS

5

5VALWS

3

3v supply

On\off switch

RSMRST 8

PM_PWRBTN

SLP3,SLP4,

9 3 volt 20

11

5vSUS

MOSFET

12 SYS_on(Runon)

13

3.3vSUS

MOSFET

17

GFX_ON

16

1.05v 0.9v

ECPWROK(PWR_GD)

6

ICH

8

ACIN

V In

SIO

SYS_ON (MAIN ON) 13 KBC_RST

6

2

15

4

SLP_S5

BIOS

Step down 1 5

19

RSMRST 22

M_PWRGD

21

ECPWORK

Clock start

20 17

23 CPU_PWRGD

25

VRMPWRGD (VGATE)

RSTIN

11

6

PLTRST

3.3V_SUSP

5V_ALWS

CLK_PWRGD

5v_SUSP

1.8v 0.9v 1.05V

To DDR 14

7

RSMRST PWROK

1.05V

17 CPU_CORE VRMPWRGD

CL_RST

SLP4/ 5 SLP3

VR_ON

CPU Core

CL_RST

24

12

3.3v_ALWS

Step Down 2

MCH

North Bridge

3.3V

www.shriraminfotech.net

CPU

CORE_V

PLTRST

3 SUSON

KBC_3D3_ALWS

RST CKT

Clock

PM_PWRBTN

7

15

HWPG

PWROK

SLP3

9

16

1

SLP4

10

CPU_PWRGD

ON/OFF SW

CPU Reset

10.8 Battary Input

PWRGD

18v adopter Input

POWER ON AND RESET SEQUENCE

CK_PWRGD

On/off SW

18

VRMPWRGD

ICH

South Bridge

23

CPU RESET R322

CPU

SIO R313

R605

ECPWROK

PCH

Battery

ALWS PWRGD MAIN PWRGD

18

3

Slp _S5

EC BIOS

SUSB, SLP_S3

5V

MOSFET

Step Down 2

8 7

22

21

20

PCH

6

3.3V

5 MAINON 1.05V(PCH, CPU) 1.5V(DDR3) 1.8V

11 GFX CORE

PM_PWRBTN RSMRST

5V

9 10

SUSC, SLP_S4

4

SUS ON

MOSFET

19

ECPWORK

2

3.3VAL

CPU PWRGD

13

DRAM PWRGD

PWRBTN

PLTRST

1

HWPG

SUS PWRGD

ACIN

Step down 1

CLOCK

14

GFX ON

12 GFXCORE V VR_ON

CPU Core

CPUCORE V

15

VR_PWRGD

ADOPTER

BIOS CS

16 CK_PWRGD

17

CLOCK CHIP

23

ADOPTER Battery

ALWS PWRGD MAIN PWRGD

CLOCK HWPG

SUS PWRGD

ACIN

5V

Step Down 2

PM_PWRBTN

3.3V

5

8 7

CPU PWRGD

22

21 20

PCH

6

MAINON 1.05V(PCH, CPU)

10 GFX CORE

SUSC, SLP_S4

RSMRST

MOSFET

9

SUSB, SLP_S3

4

SUS ON

MOSFET

19

ECPWORK

2

3.3VAL

PLTRST

1

3

SLP _S5

1.5V(DDR3)

11 12

CPU Core

GFX ON

14

GFXCORE V VR_ON CPUCORE V

16 VR_PWRGD

Step down 1

13

DRAM PWRGD

PWRBTN

15 CK_PWRGD

17

47

5

4

5V +/-5%

3.3V +/-5%

12V +/-5%

2

1

ATX4P

ATX P/S WITH 1A STBY CURRENT 5VSB +/-5%

3

-12V +/-5%

12V +/-5% Switching UP6230 4 hases

D

Switching UP6123 1 phase

VCC 5VSB

Switching APW 7120

5VDUAL P/N MOS

Vcore:0.65~1.3V Vaxg:0.65~1.3V V_CPU_VTT:1.05V

35Amax 17Amax Linear OP358

V_DIMM:1.5V

VDDQ

VCC_SA:0.925V(0.85V)

8.8Amax

28.5Amax

DDR3 DIMM (4) 1333MHz LDO 3VSB

Intel Sandy Bridge CPU

112Amax

1.0A_S0

VID 0.25~1.52V

85A(95W)

VAXG

VID 0.25~1.52V

25A

VTT

1.05V(1V)

8.5A

VCC_SA

0.925V(0.85V)

8.8A

VCCPLL

1.8V

1A

VDDQ

1.5V

4.5A

DDR_VTT:0.75V

PCH_CORE:1.05V 6.2Amax

Non AMT: VccASW(ME) short to V1P05_PCH

V_ME:1.05V

Linear OP358

1.8Amax

V_SFR:1.8V 1.6Amax

Not support DSW mode: VccDSW short to 3VSB

B

V_PROC_IO

1.05V

1mA

VccDMI

1.05V

0.057A

VccCORE

1.05V

1.6A

VccIO

1.05V

4.07A

VccADPLLA

1.05V

0.1A

VccADPLLB

1.05V

0.1A

VccCLKDMI

1.05V

0.02A

VccSSC

1.05V

0.105A

VccDIFFCLKN

1.05V

0.055A

VccASW(ME)

1.05V

1.61A

VccDFTERM

1.8V

0.2A

VccVRM

1.8V

0.159A

Vcc3_3

3.3V

0.409A

VccADAC

3.3V

0.068A

VccSPI

3.3V

0.02A

VccDSW3_3

3.3V

0.003A

VccSUS3_3

3.3V

0.097A

VccSUSHDA

3.3V

0.01A

VccRTC

3.3V

6uA(G3)

V5REF

5V

1mA

V5REF_SUS

5V

1mA

VCC3 3VSB

5VDUAL Switch IC UP7536

PCI Slot per

USB X4 Header

VCC3

USB X4 IO

3.3V

3A(S0)

3.3V

3A(S0)

5V

5A(S0)

VDD

VDD

12V

5.5A(S0)

12V

0.5A(S0)

12V

0.5A(S0)

5VDual

5VDual

3.3Vaux

0.375A

3.3Vaux

0.375A

3.3Vaux

0.375A

2.0A

2.0A

3.3V

7.6A(S0)

Total 1 Slot

Total 2 Slots

VCC3_0.5A fuse x 2

HDMI L.S. VCC3_180mA

Flash/NVM VCC3 _0.3A 1.8V_0.1A

C

Battery 3V

B

VDD3P3

3.3V

TBD

VDD1P05

1V

TBD

SUPER I/O F71808A

USB_5V

X1 PCIE Slot per

CRT VCC_1A fuse

CTRL1P0 internal LVR Output

3VSB

X16 PCIE Slot per

D

VCC3_30mA

NEC_D720200

3VDUAL P/N MOS Extrenal from V1P05_PCH

A

SPI

HDMI/DP

C

5VSB

12V_200mA

Intel Cougar Point (TDP 5.5W)

Linear OP358

VCC

Fans

LDO APL5336

15A_S0 1.0A_S3

V_SM_VTT

VCCP

USB3.0

3VSB

3.3V

TBD

VCC3

3.3V

TBD

BAT 3.3V

3.3V

TBD A

5VDual 2A

AUDIO VT1705CE

VCC3 5VSB

DVDD 3.3V

3.3V

23mA

AVDD

5V

38mA

Total 1 Slot

Elitegroup Computer Systems Title

Power Delivery

5

4

3

2

Size C

Document Number

Date:

Wednesday, July 13, 2011

Rev

H61H2-M12 Sheet 1

1.0 27

of

29

5

4

3

9 V_1P05_PCH

7 EN

2

1

12

CPUVTT

CPUVTT RT8121 D

D

13

VTT_PWRGD

38 EN_VTT

18 VCORE VCORE 19 SVDATA

VCORE RT8859A 40 VR_RDY

Bi-direction

17 VIDSOUT 19 VR_RDY

Slot:PCIEx16/x1/LAN SVDATA(B37)

SIO_PCIRST1_L

21

VCCIO

VCCCORE

SIO_PCIRST2_L

21

C

C

21 SIO_PCIRST2_L

CMOS 1.1V

RESET#(F36)

12 PCIRST2#

2 FP_PWRBTN_L

44 PCIRST3#

POWER BUTTON

3

20

PLTRST_L

4

RSMRST_L

6

SLP4_L

SUSB# 32

7

SLP3_L

PWRON# 33

5

SIO_PWRBTN_L

LRESET 15

35 PANSHW#

RSMRST# 45

3VSB

31 SYS_3VSB

SUSC# 37

Super I/O 29 3VSB ITE 8758

PLTRST#(BK48) RSMRST#(BK38)

PWRGD[1..3] 32/18/78

55 VIN1

PROCPWRGD(D53)

8

+VCC

PSON_L

ATX_PWRGD

4, 6, [21..23] VCC5

Desktop Processor Socket H2

16 CPU_PWROK

UNCOREPWRGOOD(J40)

15 CPU_BCLK

BCLK(W1/W2)

14 DRAM_PWROK

SM_DRAMPWROK(AJ19)

SLP_S4#(BN52) SLP_S3#(BM53)

CPUCLK(P31/R31)

PWRBTN#(BT43)

PWROK

PWROK(BJ38)

DRAMPWROK(BG46)

B

36 PSON#

9

10

11

Sandy Bridge

SYS_PWROK(BJ53)

B

54 ATXPG

CPU

PCH Cougar Point

SYS_RESET#(BE52)

SYSRST_L RESET BUTTON

16 PS_ON

8 PWROK

ATX_POWER 1 3VSB_IO A

9 5VSB

A

Elitegroup Computer Systems Title

Power Sequence, Reset Diagram

5

4

3

2

Size Custom

Document Number

Date:

Wednesday, July 13, 2011

Rev

H61H2-M12 Sheet 1

1.0 28

of

29

+1.05V_RUN

Timing Diagram for S5 to S0 mode

+1.05V_M

PCH

PWRBTN#

VCC VCCIO VCCUSBPLL V_PROC_IO VCCCLK VCCASW

RSMRST# SLP_S5# SLP_S4#

+1.5V_RUN VCCADAC1_5 VCCVRM

SLP_S3# SLP_A#

+3.3V_ALW_PCH VCCSUS3_3 VCCSUSHDA

CPU PM_DRAM_PWRGD_CPU

14

+3.3V_RUN

+VCC_CORE

SM_DRAMPWROK

VCCADACBG3_3 VCC3_3_R30 VCC3_3_R32 VCC3_3 VCCCLK3_3

VCC

+VCCIO_OUT

15 17

VCCIO_OUT

H_CPUPWRGD

PWRGOOD

+VCOMP_OUT

PLTRSTIN

SLP_WLAN#/GPIO29

VDDDSW3_3

PWROK

4

SIO_SLP_S4# SIO_SLP_S3#

5

SIO_SLP_A# SIO_SLP_LAN# SIO_SLP_WLAN# SYS_PWROK

16

RESET_OUT#

13 DRAMPWROK

+1.35V_MEM VDDQ

SYS_PWROK

PCH_RSMRST# SIO_SLP_S5#

+3.3V_ALW

3

VCOMP_OUT CPU_PLTRST#_R

SLP_LAN#

SIO_PWRBTN#

17 7 4

PCH_PLTRST# PM_APWROK_R PCH_DPWROK

PLTRST#

PROCPWRGD

PM_DRAM_PWRGD

14 H_CPUPWRGD

15

APWROK DPWROK Pop option GPIO54

DGPU_PWR_EN#

DMN65D8LW-7

DGPU_PWR_EN

11

+3.3V_ALW +LCDVDD

TPS22965

LCD_ENVDD_SW GPIO17

DGPU_PWROK

12

MXM

+3.3V_ALW Pop option

6

+3.3V_M

+3.3V_LAN

TPS22965

SIO_SLP_LAN#

DGPU_PEX_RST#

17

+5V_ALW

Power Button

RUN_ON SIO_SLP_S3#

SIO 5048

SIO_SLP_S4#

5

+5V_RUN

TPS22965

+5V_HDD

1BAT

2AC

+3.3V_ALW

SIO_SLP_M#

TPS22965

SIO_SLP_LAN#

9

+3.3V_RUN

+PWR_SRC

ADAPTER EC 5075

ALWON

1BAT +5V_ALW +3.3V_ALW

TPS5125

+1.05V_M

2AC

ALW_PWRGD_3V_5V

SI4164DY

+1.05V_RUN

+3.3V_ALW SYN470DBC

BATTERY

1.35V_SUS_PWRGD

5048

+1.5V_RUN

DGPU_PWROK

11 +MXM_PWR_SRC

PCH_RSMRST#

+3.3V_ALW

+PWR_SRC +PWR_SRC_MXM

10

4

DGPU_PWR_EN

MXM

SI4835D

IMVP_VR_ON

3.3V_RUN_GFX_ON

ISL95812

PCH_ALW_ON

12

+VCC_CORE

7

IMVP_PWRGD

PM_APWROK A_ON

+3.3V_ALW

10

+3.3V_MXM

TPS22965

3.3V_RUN_GFX_ON

+5V_ALW

10

+5V_MXM

TPS22965

+PWR_SRC SUS_ON

8

14

+1.35V_MEM

0.75V_DDR_VTT_ON

RT8207MZ

3.3V_RUN_GFX_ON

VDDQ

+0.675V_DDR_VTT

1.35V_SUS_PWRGD

VTT

RESET_OUT#

5

+3.3V_PCIE_FLASH

TPS22965

SUS_ON MCARD_MISC_PWREN

TPS22965

6

AUX_EN_WOWL

MODC_EN

TPS22965

+3.3V_LAN

+1.05V_M

6

1.05V_A_PWRGD

5075

+PWR_SRC +3.3V_SUS

8

+5V_MOD

PCH_ALW_ON

TP0610K

+PWR_SRC_S

12 +PWR_SRC

+3.3V_ALW +3.3V_PCIE_WWAN

EN_INVPWR

NVRAM_PWR_EN

TPS22965

3

Pop option

+3.3V_M

+5V_ALW

+3.3V_ALW +3.3V_WLAN

TPS22965

TPS51212

SIO_SLP_S5#

+3.3V_ALW +3.3V_ALW

TPS22965

+3.3V_ALW_PCH

+PWR_SRC A_ON

DDR

TPS22965 +3.3V_ALW

BC BUS

FDC654P

+BL_PWR_SRC

3

5

4

3

2

1

Wistron HURON RIVER POWER UP SEQUENCE DIAGRAM 5V_S5

-6 AC Adapter in

DCBATOUT

AD+

-3a

-3a

-3a

Page38

VDDP

3a

1D5V_S3

VIN

S5_ENABLE

3V_5V_EN

PWR_5V3D3V_ENC

D

VOUT

D

3 PM_SLP_S4#

-3b PWR_CHG_ACOK

-3c

EN

DDR_VREF_S3

REF

SWITCH

ENC

LL1

Page40

LL2

5V_S5

PUMP

3D3V_S5

15V_S5

5a

SWITCH Page40

VREG5

TPS51123RGER DC/DC (3V/5V)

-5 DCBATOUT

VREG3

PGOOD

VIN

5V_AUX_S5

0D75V_S0

VTT

3D3V_AUX_S5

3b

TPS51216RUKR 1.05VTT_PWRGD

-4

VTT_EN

3

RUNPWROK

PGD

PM_SLP_S4#

3V_5V_POK

Page46

5

Page41

DC Battery

5V_S0

PM_SLP_S3#

SWITCH

-3

Page39

Page37

3D3V_AUX_KBC

VDD

-3a

Page40 ACOK

-6a

VOUT

1D8V_S0

TPS53311RGTR EN

RUNPWROK PGD

1D5V_S0

Page47

SWITCH

C

C

5

Page37

1 -1

PM_SLP_S3#

Page37

GPIO34

GPIO70

VIN

4

3D3V_S0 SWITCH

S5_ENABLE

AC_IN#

3D3V_S5

5V_S5

4

BQ24707 Charger

BT+

KBC_PWRBTN#

SLP_S4#

KBC NPCE795P

GPIO6

-2

Power Button

PM_SLP_S4#

GPIO43

GPIO44

PM_SLP_S3#

GPIO20

GPIO01

SLP_S3#

PM_RSMRST# PM_PWRBTN#

9 RSMRST#

2 GPIO77

Y

Cougar Point PCH

VDDPWRGOOD

SM_DRAMPWROK

A

H_CPUPWRGD_R

H_CPUPWRGD

PROCPWRGD

8

B

DRAMPWRGD

PWRBTN#

Page27

AND GATE

0D75V_EN

PM_DRAM_PWRGD

UNCOREPWRGOOD

10

Sandy Bridge CPU

15

S0_PWR_GOOD

APWROK PLT_RST#

PWROK

BUF_CPU_RST# RSTIN#

PLTRST#

SYS_PWROK

SVID

SYS_PWROK SVID

14 5V_S5

B

V5IN

VIN

VOUT

5 RUNPWROK

5a

1D05_VTT

B

TPS51218DSCR EN

Page45

PGOOD

VDDP

14

VIN VOUT

5b

1.05VTT_PWRGD

5b

5V_S5 DCBATOUT

1.05VTT_PWRGD

0D85_S0

IMVP_PWRGD

SYS_PWROK

5c

-4

-7

TPS51461RGER

-8

PGOOD

+RTC_VCC

6 DCBATOUT

11

6

7

D85V_PWRGD

IMVP_VR_ON

RTC battery

VIN

OUTPUT

SVID

3D3V_AUX_S5

RTC_AUX_S5 D85V_PWRGD

EN

Page48

A

11

DCBATOUT

VCC_CORE

SVID

VCC_GFXCORE

VR_ON

IMVP_PWRGD

VR OUTPUT ISL95831HRTZ

12 A

13 Page42 & 43 & 44 PGOOD

DV15 HR Vos GIGA HDMI NoSurge

Wistron Corporation 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Power Up Sequence: -8 ~ 15 5

4

3

2

Title

Power Sequence Diagram

Size A2

Document Number

Date:

Thursday, June 02, 2011

Rev

Enrico/Caruso 15 HR Sheet 1

99

X01 of

104