Igct Training

IGCT Training

René Ernst Sales Engineer Insert image here

© ABB Switzerland Ltd - 1 6/1/2014

Insert image here

Insert image here

© ABB Switzerland Ltd - 2 -

Contents 

Principle of operation



Basic Topologies



Design criteria for VSI



VSI clamp circuit design



Applying IGCT gate unit



Series connection

© ABB Switzerland Ltd - 3 -

Introduction to IGCTs

Electronic Switches 

Thyristor



Can be turned on by gate signal but can only be turned off by reversal of the anode current

 



© ABB Switzerland Ltd - 4 -



 

Gate Turn-Off Thyristor (GTO) Can be turned on and off by the gate signal but requires large capacitor (snubber) across device to limit dv/dt

Transistors (transitional resistor) Can be turned on and off by the gate (or base) signal but has high conduction losses (its an amplifier, not a switch)

Integrated Gate Commutated Thyristor (IGCT) Can be turned on and off by the gate signal, has low conduction loss and requires no dv/dt snubber

IGCT model ANODE

GATE

A

G

A

Ia

G

Ik © ABB Switzerland Ltd - 5 -

CATHODE

K K

Two-transistor “Regenerative Switch” model of a GTO

Principle of IGCT Operation Anode

Anode

P

VAK

N

N

I AK P

Gate

P

Gate

N

P N

I GK

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Cathode

Conducting Thyristor

- VGK Cathode

Blocking Transistor

Hard Turn-off mode UAK, IA, IG UAK

anode current

t gate current

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UGK tcomm

tdesat

UGK

t

Snubber less operation => tdsat > 0

IGCT Turn-off Vd (kV)

Ia (kA)

Vdm anode voltage Vd

4 Itgq

3

3

2 1

4

thyristor

x

anode current Ia transistor

Tj = 90°C

1 0

0 starts to block

© ABB Switzerland Ltd - 8 -

-10

gate voltage Vg

-20

Vg (V)

2

15

20

25

30

35

ts)

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Thermal distribution

IGCT = GTO + IGBT? GTO’s

IGBT’s



low cost device



low cost circuit



high reliability



fast switching

IGCT’s  lowest cost device  lowest cost circuit

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 highest reliability  fastest switching  highest efficiency

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Turn off capability GTO <=> IGCT

7 6 5 4 3 2 1 0 0

1

2

3

4

Snubber Capacitance (uF)

5

6

Basic Topologies R

L

DclampLs VR

S1

S3

S5

S2

S4

S6

Cclamp

Clamp Network

FWD 6

IGCT Inverter

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FWD1

S1

S3

S5

S2

S4

S6

VD C

IGBT Inverter

GTO, IGBT and IGCT phase-legs IGCT

Schematics IGBT

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GTO

Application Specific Asymmertric IGCT

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Eoff @ 2.8kV, 3.3kA, 125°C [Ws]

Technology curves of asymmetric 4 kA / 4.5 kV IGCT's 30 28 26

homogeneous lifetime engineering

12

local lifetime engineering

24 22

10

20 18 16

11

14 12 10 1.50

1.70

1.90

2.10

2.30

2.50

2.70

VT @ 3.3kA, 125°C [V]

Type 12: Low on-state losses Type 10: Low total losses Type 11: Low switching losses

2.90

3.10

3.30

3.50

Overview 4.5 kV asymmetric IGCT low on-state losses (Type 12)

low total losses (Type 10)

low switching losses (Type 11)

Part N°

5SHY 35L4512

5SHY 35L4510

5SHY 35L4511

Junction temp. range

-40°C – 125°C

-40°C – 125°C

10°C – 125°C

2V

2.7 V

3.5 V

37 Ws

22 Ws

17 Ws

AC/DC breakers (SSB)

Traction, Energy Management

High Frequency MVDs

Type

VTM @ 4 kA, 125°C

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EOFF @ 4 kA, 2.8 kV, 125°C Typical application

Snubberless Operation 5000

UAK (25°C)

UAK (125°C)

5.00E+01

4000

4.00E+01 p n p n

p n p n

2000 1000

p n p n

3.00E+01

p n p n

UGK [ a.u.]

UAK, IA [ V, A]

3000 2.00E+01 1.00E+01

0

t(25°C)

0.00E+00

UGK

-1000

Tj=-1.00E+01 25°C Tj =-2.00E+01 125°C

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-2000 t(125°C)

-3000 -0.5

0

0.5

1

1.5 t [s]

-3.00E+01 2

2.5

3

Turn-off waferforms at different temperatures

UAK, IA, [V, A]

4000

UAK Tj = 125°C Tj = 75°C Tj = 25°C

3000 2000 IA 1000

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0 8

9

10

11

t [s]

IGCT type 5SHY 35L4511

Turn-off waferforms @ Tj = 125°C UAK

IA, UAK, [A, V]

4000 3000

4510 4511 4512

2000 IA 1000

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0 6

8

10

12

t [s]

Signifficant reduction of tail current

14

Turn-off waveforms = f(Tj) 5

5 VDM = 3470 V

kV

5SHY 35L4510 @ Tj = -40°C

kA

4

4 ITGQ = 3200 A

3

3

2

2

VDC = 2800 V 1

1

0

0

40

60

80

µs

100 kV

5

5 V DM = 4280 V

kA

4

4 ITGQ

=

3250 A

3

3

2

2

© ABB Switzerland Ltd - 19 -

VDC = 2800 V

5SHY 35L4510 @ Tj = 125°C

1

1

0

0

40

60

80

µs

100

© ABB Switzerland Ltd - 20 -

Simple GCT Construction

VSI Test Circuit

Li

LCL

DUT

Rs

VLC

CCL

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LLoad

VSI test circuit waveforms Turn-on

Turn-off

di/dt

VDM

ITM

VDSP VD

IT

VD

IT

0.9 VD CS

CS

0.4 ITGQ

0.1 VD VG

VG

SF SF tdon1 tdoff

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tdon tr

VSI test circuit parameters 

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

Design these parameters to IGCT and diode capability: 

Stray inductance, LCL



di/dt limiting inductor, LI



Clamping capacitor, CCL



Clamping resistor, RS

These parameters are normally given by converter system design and does not normally influence IGCT performance or design: 

DC link capacitor, CDC



Load inductor, LLOAD

Design criterions for di/dt limiting inductor 



Component di/dt capability (SOA) 

IGCT



Diode

Maximum surge current capability 

© ABB Switzerland Ltd - 24 -



determined by LI and CDC

Diode switching losses 

Losses increase when LI value reduce

Component di/dt capability 

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

GCT di/dt capability: 

very high (compared to GTO) due to hard driven principle.



very high turn-on pulse di/dt ( >500A/us) ensures homogeneous, robust and “lossless” turn-on.



More than 3000A/us has been applied in application.

Diode di/dt capability: 

Mostly the limiting part in IGCT VSI design



This is especially true for snubberless applications which has become standard in the market.



Typical values are between 200 and 1000 A/us dependent on wafer size and maximum required switching voltage.

di/dt limiting inductor value 

In VSI topologies, the diode turn-off di/dt capability mostly determines the size of the di/dt choke.

Li > (Vdc/(di/dtmax))

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

A bigger inductor value might be chosen in order to limit switching losses of the diode or to limit the surge current stress during shoot-through in a phase leg.

Stray inductance design 

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

The stray inductance, LCL, significantly influence 

IGCT turn-off SOA and losses



Diode turn-off SOA and losses



Diode snap behaviour at low turn-off currents 

Snap overvoltage



Noise emission due to high frequency oscillations

If LCL data sheet values are exceeded, SOA and specified turn-off losses are not valid.

Turn-off losses versus stray inductance Eoff = f(Ls)

Variation der Clampinduktivität: 300nH / 800nH / 1500nH Testbedingungen:

V300

V800

allg. Bedingungen:

El. Typ= 5SGY35L 4510 ITGQ= 3000A Tj= 125°C V1500

I_300

I_800

I_1500

kV

Vzk = 2kV Ls = 3.7µH Ls2 = 1.5µH Rs = 0.5 Ohm Ccl = 7.6 µF Dcl, Df = 5SDF10H4502

Clampinduktivität: 300nH / 800nH / 1500nH

Testbedingungen:

V300 P300

El. Typ= 5SGY35L 4510 ITGQ= 3000A Tj= 125°C

V800 P800

V1500 P1500

I_300 e300

I_800 e800

allg. Bedingungen:

I_1500 e1500

Vzk = 2kV Ls = 3.7µH Ls2 = 1.5µH Rs = 0.5 Ohm Ccl = 7.6 µF Dcl, Df = 5SDF10H4502

kV

kA 4.50

3.0

3.75

2.5

3.00

2.0

2.25

1.5

1.50

1.0

0.75

0.5

0.00

0.0

12

24

10

20

8

16

6

12

4

8

2

4

0

0

4

3

2

1

0

kA

MW

3

© ABB Switzerland Ltd - 28 -

2

1

0

2

4

6

8

10

12

14

5

10

15

µs

µs

J

© ABB Switzerland Ltd - 29 -

The RLC clamp circuit 

Analysis of damped parallel resonance circuit comprising LI, CCL and RS allows for an initial determination of CDC and RS values.



This analysis yield a reasonably good result when 

CDC >> CCL



Stray inductances are small (LS1, LS2)



LLOAD >> LI

VSI test circuit again - more details Ls Dcl Ls2

Rs

Last

Prüfling

Ls1

GCT 

Ccl Uzk

Czk DQ

Prüfling

© ABB Switzerland Ltd - 30 -

Diode

I

RLC circuit - 2. Order differential equation 

Differential equation: 



© ABB Switzerland Ltd - 31 -

D = ( LI / CCL)/(2RS) ½



D  0.8

(2)



K1  0.9

(3)

Clamping capacitor: 



(1)

Damping factor: 



LI CCL * (diL/dt)2 + (LI / RS) * (diL/dt) + iL = 0

CCL > (LI *D4*IL)/(K1*ΔVCL)

Damping resistor: 

Rs = ( Li / Ccl)/(2D) ½

(4)

© ABB Switzerland Ltd - 32 -

RLC circuit - why damping resistor? 

To allow clamping capacitor to discharge before next switching transition (switching overvoltages does not add up to exceed component ratings).



Limit switching voltage overshoot VDM



Prevent current flowing in clamping diode after switching transition due to additional oscillations in RLC circuit (slightly undercritical damping - see formula 2)



Value obtianed with formula (4)

RLC circuit - the clamping capacitor

© ABB Switzerland Ltd - 33 -



Value obtained through formula (3) where 

K1  0.9



CCL > (LI *D4*IL)/(K1*ΔVCL)



D is damping factor (formula (2))



IL < ITGQM - maximum turn-off current of the application which has to be lower than maximum controllable turn-off current of the device according to specification



ΔVCL = VDM - VDCMAX which is the difference between the maximum allowed peak voltage and the maximum required dc link voltage of the application



K1 - this factors accounts for the influence of the stray inductance, LS2, which is never zero although kept as low as possible

(3)

Block diagram - AC input Supply 24 ... 40VAC or 24 ... 40VDC

Stabilizer

20V DC

Internal Supply

TurnOn Circuit

LEDs Command Signal (Light) Status Feedback (Light)

Anode

Rx

Tx

Anode Monitoring

© ABB Switzerland Ltd - 34 -

For IGCT part numbers:

 AS-IGCT: 5SHY 35L451x  RB-IGCT: 5SHZ 08F6000

Gate

Logic Monitoring TurnOff Circuit

Kathode

© ABB Switzerland Ltd - 35 -

Power up - AC input 

AC input: Inrush current of about 9 A flows during about 150 ms.



Gate drive has current limiter on the board.



DC input: Gate drive does not provide inrush current limitation

© ABB Switzerland Ltd - 36 -

Isolation interface 

The isolation requirements appears as a function of the maximum applied voltage of the specific application



Also the supplied power to the gate drive varies from project to project



Consequently isolation transformer is difficult to standardize



 Gate drive has no onboard isolation transformer!

Optical interface - receiver 

Receiver for command signal

© ABB Switzerland Ltd - 37 -



Agilent, Type HFBR-2528



Pon CS

Optical input power > -21 dBm Valid for 1mm plastic optical fibre (POF)



Poff CS

Optical noise power



tGLITCH

Pulse width threshold  400 ns Max. pulse width without response

< -40 dBm

Optical interface - transmitter 

Transmitter for status feedback

© ABB Switzerland Ltd - 38 -



Agilent, Type HFBR-1528



Pon SF

Optical output power

> -19 dBm



Poff SF

Optical noise power

< -50 dBm

Turn-on circuitry G 20V

K V1

D1

D2

Turn on delay time: 2.75 - 2.85 us Less than 100 ns spread of delay time

L1

C L2 D3

© ABB Switzerland Ltd - 39 -

0V

V2

V3

CH4: Command signal (HIGH: light) CH2: Turn-on current CH1: VGK

Turn-off circuit G 20V

K

Turn off delay time: 2.75 - 2.85 us Less than 100 ns spread of delay time

C

OFF

V6

0V

CH4: Command signal (HIGH: light)

© ABB Switzerland Ltd - 40 -

CH1: VGK CH2: On-state current [20 A/Div]

On-state: Back-porch current circuit  Chopper in current control mode

C1

L4

20V

G

K L3 C GHK V4

0V

© ABB Switzerland Ltd - 41 -

V5

CH4: Command signal (HIGH: light) CH2: Back porch current [5 A/Div]

On-state: Re-triggering (external)  Re-firing of turn-on pulse can be commanded via command input

CH4: Command signal (HIGH: light)

CH1: VGK

© ABB Switzerland Ltd - 42 -

CH2: Turn-on current 50 A/Div

On-state: Re-triggering (internal)  Gate voltage detection also controls re-triggering of turn-on pulse

CH1: VGK

© ABB Switzerland Ltd - 43 -

CH2: Turn-on current [50 A/Div]

Power consumption (1): transferred power 

Ptransfer = Vgint* Qgq(Itgq)*fs 

Vgin

: internal regulated voltage



Qgq(Itgq)

: charge transferred to the power circuit



fs

: switching frequency

100.0 90.0 50Hz 500 Hz 1000 Hz

80.0 70.0

Pg q [W]

60.0 50.0

© ABB Switzerland Ltd - 44 -

40.0 30.0 20.0 10.0 0.0 0

200

400

600

800 Itgq [A]

1'000

1'200

1'400

Power consumption (2): dissipated power Standby Turn-on pulse

© ABB Switzerland Ltd - 45 -

power [W]

Back porch current

35 30 25 20 15 10 5 0

duty cycle:

0.1 0.5 1

0

200

400

600

800

Switching frequency [Hz]

1000

Thermal management 

Calculated lifetime of on-board capacitors 20 years.



With slightly forced air cooling (air velocity > 0.5 m/s).



Strong air cooling allows for increased ambient temperature.

ITGQ(AVG) [A] 3000 2500 2000 1500

Tamb(max) = 40 °C

© ABB Switzerland Ltd - 46 -

1000 500 Tamb(max) = 50 °C

0 250

350

450

550

650

750

850

950 FS [Hz]

Limits for full lifetime operation for 5SHY 35L4510

Supply voltage

Optical Status Feedback output

Status GK

Status VGint

SF

LEDs

Gate to cathode voltage

CS

Gate drive status

Optical Command Signal Input

Diagnostics: Status feedback

HIGH

ON

OK

Inverse input signal CS

OK

Power OK, Gate ON

HIGH

OFF

OK

Inverse input signal CS

OK

Power OK, Gate ON

Don’t care

CS

FAIL

Power OK, Fault

(toff <10us) HIGH

OFF

© ABB Switzerland Ltd - 47 -

(toff >10us) HIGH

Don’t care

FAIL

CS

FAIL

Fault

LOW

OFF

OK

Inverse input signal CS

OK

Power OK, Gate OFF

LOW

ON

Don’t care

CS

FAIL

Power OK, Gate ON, Fault

LOW

Don’t care

FAIL

CS

FAIL

Gate OFF, Fault

Diagnistics: Fault conditions 

Loss of power supply 

© ABB Switzerland Ltd - 48 -



On state hold-up time (no switching): >300 ms Off state hold-up time (no switching): >500 ms



Open circuit gate



Supply overvoltage



Short circuit gate

© ABB Switzerland Ltd - 49 -

Gate Off (Green)

Gate ON (Yellow)

Fault (Red)

Power OK (Green)

Diagnostics: LED display

EMI testing: dv/dt stress Amplitude: 3 kV

© ABB Switzerland Ltd - 50 -

dv/dt: 13 kV/us

© ABB Switzerland Ltd - 51 -

EMI testing: di/dt stress

© ABB Switzerland Ltd - 52 -

EMI testing: di/dt stress

© ABB Switzerland Ltd - 53 -

Vibration compliance: Test set-up

© ABB Switzerland Ltd - 54 -

Vibration compliance: Test parameters

IGCT meets IEC standard IEC 61373

© ABB Switzerland Ltd - 55 -

Series connection with RC-snubber (1)

Series Connection with RC-snubber (2)

© ABB Switzerland Ltd - 56 -



Design Trade-offs for RC-snubber

Dynamic turn-off voltage deviation:

1 V   I TGQ  tdoff Cs