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POWER ELECTRONICS Devices, Circuits, and Applications FOURTH EDITION
CHAPTER CHAPTER
4
Power Transistors
Power Electronics: Devices, Circuits, and Applications, 4e Muhammad H. Rashid
Copyright ©2014 by Pearson Education, Inc. All rights reserved.
Learning Outcomes
After completing this chapter, students should be able to do the following: List the characteristics of an ideal transistor switch. Describe the switching characteristics of different power transistors such as MOSFETs, COOLMOS, BJTs, IGBTs, and SITs. Describe the limitations of transistors as switches. Describe the gate control requirements and models of power transistors. Design di/dt and dv/dt protection circuits for transistors. Determine arrangements for operating transistors in series and parallel. Describe the SPICE models of MOSFETs, BJTs, and IGBTs. Determine the gate-drive characteristics and requirements of BJTs, MOSFETs, JFETs, and IGBTs. Describe the isolation techniques between the high-level power circuit and the low-level gate-drive circuit.
Power Electronics: Devices, Circuits, and Applications, 4e Muhammad H. Rashid
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Symbols and Their Meanings
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Table 4.1
Material Properties of Silicon and WBG Semiconductor Materials
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Figure 4.1
Depletion-type MOSFETs.
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Figure 4.2
Enhancement-type MOSFETs.
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Figure 4.3
Power MOSFETs. (Reproduced with permission from International Rectifier.)
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Figure 4.4
Cross sections of MOSFETs. [Ref. 10, G. Deboy]
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Figure 4.5
Transfer characteristics of MOSFETs.
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Equation 4.1
Steady-State Characteristics
• The transfer characteristics in Figure 4.5b
for n-channel enhancement MOSFETs can be used to determine the on-state drain current iD from [29]
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Figure 4.6
Output characteristics of enhancement-type MOSFET.
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Equations 4.2 and 4.3
Output Characteristics
• In the linear or ohmic region, the drain–
source νDS is low and the iD–νDS characteristic in Figure 4.6 can be described by the following relationship:
• which, for a small value of νDS ( VT), can
be approximated to
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Equation 4.4
Output Characteristics
• The load line of a MOSFET with a load
resistance RD as shown in Figure 4.7a can be described by
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Figure 4.7
Steady-state switching model of MOSFETs.
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Equation 4.6
Steady-state Switching Model
• The transconductance gain gm can be
determined from Eqs. (4.1) and (4.2) at the operating point at νGS = VGS and iD = ID as
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Equation 4.8
Steady-state Switching Model
• For a small value of vDS(
VT) in the linear or ohmic region, Eq. (4.3) gives the drain– source resistance RDS as
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Figure 4.8a–b
Parasitic model of enhancement of MOSFETs.
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Figure 4.8c
Parasitic model of enhancement of MOSFETs.
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Figure 4.9
Switching model of MOSFETs.
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Figure 4.10
Switching waveforms and times.
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Figure 4.11
Cross section of a single cell of a 10 A, 10-kV 4H-SiCD MOSFET.
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Figure 4.12
Parasitic devices of n-channel MOSFET [42].
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Figure 4.13
Cross section of an SiC power 6H-MOSFET [39].
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Figure 4.14
Cross section of COOLMOS.
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Figure 4.15
The linear relationship between blocking voltage and on-resistance. [Ref. 10, G. Deboy]
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Figure 4.16
Schematic and symbol of an n-channel JFET.
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Figure 4.17
Schematic and symbol of a p-channel JFET.
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Figure 4.18
Biasing of JFETs.
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Figure 4.19
Simplified n-channel JFET structure.
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Figure 4.20
Characteristics of an n-channel JFET.
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Equations 4.10 and 4.11
Characteristics of an n-channel JFET.
• The drain current iD can be expressed as
• which, for a small value of VDS (
can be reduced to
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|Vp|),
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Equations 4.12 and 4.13
Characteristics of an n-channel JFET.
• Substituting the limiting condition νDS =
νGS − Vp into Eq. (4.10) gives the drain current as
• The pinch-down locus can be obtained by
substituting νGS = VDS + Vp into Eq. (4.12):
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Figure 4.21
Cross section of the normally-on SiC LCJFET.
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Figure 4.22
A typical structure of a SiC vertical JFET.
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Figure 4.23
Cross section of the SiC VTJFET.
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Figure 4.24
Cross sections of SiC BGJFET and SiC DGTJFET.
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Figure 4.25
Bipolar transistors.
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Figure 4.26
NPN-transistors. (Courtesy of Powerex, Inc.)
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Figure 4.27
Cross sections of BJTs.
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Figure 4.28
Characteristics of NPN-transistors.
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Figure 4.29
Transfer characteristics.
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Figure 4.30
Model of NPN-transistors.
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Equations 4.14 and 4.15
Model of NPN-transistors
• The equation relating the currents is
• The ratio of the collector current IC to base
current IB is known as the forward current gain, βF :
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Equations 4.19 and 4.20
Model of NPN-transistors
• From Eqs. (4.14) and (4.16)
• Because βF
1, the collector current can be expressed as
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Equation 4.21
Model of NPN-transistors
• The constant αF is related to βF by
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Figure 4.31
Transistor switch.
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Equations 4.23 and 4.26
Transistor Switch
• Let us consider the circuit of Figure 4.31,
where the transistor is operated as a switch.
• The maximum collector current in the
active region, which can be obtained by setting VCB = 0 and VBE = VCE, is
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Equations 4.28 and 4.29
Transistor Switch
• If the collector–emitter saturation voltage
is VCE(sat), the collector current is
• and the corresponding value of base
current is
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Equations 4.30 and 4.31
Transistor Switch
• The ratio of IB to IBS is called the overdrive
factor (ODF):
• and the ratio of ICS to IB is called as forced
β, βforced where
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Figure 4.32
Transient model of BJT.
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Figure 4.33
Switching times of bipolar transistors.
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Figure 4.34
Charge storage in saturated bipolar transistors.
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Equations 4.33 and 4.34
Charge Storage
• The saturating charge, is proportional to
the excess base drive and the corresponding current Ie:
• and the saturating charge is given by
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Figure 4.35
Waveforms of transistor switch.
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Equations 4.35 and 4.36
Charge Storage
• The average power loss during the delay
time is
• During rise time, 0 ≤ t ≤ tr:
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Equations 4.37 and 4.38
Charge Storage
• The power Pc(t) is maximum when t = tm,
where
• and Eq. (4.36) yields the peak power
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Equation 4.44
Charge Storage
• This power loss during fall time is
maximum when t = tf /2 = 1.5 μs and Eq. (4.43) gives the peak power,
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Figure 4.36
Plot of instantaneous power for Example 4.2.
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Figure 4.37
Turn-on and turn-off load lines.
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Figure 4.38
Cross-sectional view of the 4H-SiC BJT device.
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Figure 4.39
Cross section and equivalent circuit for IGBTs.
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Figure 4.40
Symbol and circuit for an IGBT.
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Figure 4.41
Typical output and transfer characteristics of IGBTs.
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Figure 4.42
Simplified structure of a 4H-SiC p-channel IGBT.
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Figure 4.43
Cross section and symbol for SITs.
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Figure 4.44
Typical characteristics of SITs. [Ref. 18, 19]
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Table 4.2
Comparisons of Power Transistors
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Table 4.3
Operating Quadrants of Transistors with Diodes
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Table 4.3 (continued)
Operating Quadrants of Transistors with Diodes
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Table 4.3 (continued)
Operating Quadrants of Transistors with Diodes
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Figure 4.45
Thermal equivalent circuit of a transistor.
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Equation 4.50
Thermal equivalent circuit
• The ambient temperature is
and
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Figure 4.46
Voltage and current waveforms.
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Equations 4.51 and 4.52
Voltage and Current Waveforms
• During turn-on, the collector current rises
and the di/dt is
• During turn-off, the collector–emitter
voltage must rise in relation to the fall of the collector current, and dv/dt is
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Figure 4.47
Transistor switch with di/dt and dv/dt protection.
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Equations 4.53 and 4.54
di/dt and dv/dt Protection
• The equivalent circuit during turn-on is
shown in Figure 4.48a and turn-on di/dt is
• Equating Eq. (4.51) to Eq. (4.53) gives
the value of Ls,
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Equation 4.55
di/dt and dv/dt Protection
• The capacitor voltage appears across the
transistor and the dv/dt is
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Figure 4.48
Equivalent circuits.
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Equations 4.56 and 4.57
Equivalent Circuits
• Equating Eq. (4.52) to Eq. (4.55) gives
the required value of capacitance,
• For unity critical damping, δ = 1, and Eq.
(18.15) yields
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Figure 4.49
Discharge current of snubber capacitor.
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Equation 4.58
Discharge Current
• A discharge time of one-third the
switching period Ts is usually adequate.
or
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Figure 4.50
Parallel connection of transistors.
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Figure 4.51
Dynamic current sharing.
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Figure 4.52
PSpice BJT model.
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PSpice BJT Model
• The model statement for NPN-transistors
has the general form
• and the general form for PNP-transistors is
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PSpice BJT Model
• The symbol for a BJT is Q, and its name
must start with Q. The general form is
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Figure 4.53
PSpice n-channel MOSFET model.
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PSpice n-channel MOSFET Model
• The model statement of n-channel
MOSFETs has the general form
• and the statement for p-channel MOSFETs
has the form
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Figure 4.54
IGBT model. [Ref. 16, K. Shenai]
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Equation 4.61
IGBT model
• Cdg is expressed by
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Figure 4.55
Equivalent circuits of IGBT SPICE models. [Ref. 21, K. Sheng]
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Figure 4.56
Fast-turn-on gate circuit.
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Equations 4.62 and 4.63
Fast-turn-on Gate Circuit
• When the gate voltage is turned on, the
initial charging current of the capacitance is
• and the steady-state value of gate voltage
is
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Figure 4.57
Totem pole arrangement gate drive with pulse-edge shaping.
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Figure 4.58
Gate driver of the normally-on SiC JFET [43].
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Figure 4.59
Two-stage gate-drive unit for normally-off SiC JFETs [43].
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Figure 4.60
Two-stage gate drive for normally-off SiC JFETs [54].
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Figure 4.61
Base driver current waveform.
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Figure 4.62
Base current peaking during turn-on.
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Equations 4.65 and 4.66
Turn-on Control
• The final value of the base current is
• The capacitor C1 charges up to a final
value of
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Equation 4.67
Turn-on Control
• The charging time constant of the
capacitor is approximately
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Figure 4.63
Base current peaking during turn-on and turn-off.
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Figure 4.64
Proportional base drive circuit.
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Figure 4.65
Collector clamping circuit.
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Equations 4.69 and 4.72
Antisaturation Control
• The base current without clamping, which
is adequate to drive the transistor hard, can be found from
• The load current is
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Equation 4.74
Antisaturation Control
• From Eq. (4.72),
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Figure 4.66
Base drive with speed-up capacitor for a SiC BJT [43].
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Figure 4.67
Single-phase bridge inverter and gating signals.
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Figure 4.68
Gate voltage between gate and ground.
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Figure 4.69
Transformer-isolated gate drive.
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Figure 4.70
Optocoupler gate isolation.
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Figure 4.71
Power MOSFET connect to the high voltage rail side.
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CHAPTER CHAPTER
4
Power Transistors
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Learning Outcomes
After completing this chapter, students should be able to do the following: List the characteristics of an ideal transistor switch. Describe the switching characteristics of different power transistors such as MOSFETs, COOLMOS, BJTs, IGBTs, and SITs. Describe the limitations of transistors as switches. Describe the gate control requirements and models of power transistors. Design di/dt and dv/dt protection circuits for transistors. Determine arrangements for operating transistors in series and parallel. Describe the SPICE models of MOSFETs, BJTs, and IGBTs. Determine the gate-drive characteristics and requirements of BJTs, MOSFETs, JFETs, and IGBTs. Describe the isolation techniques between the high-level power circuit and the low-level gate-drive circuit.
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Symbols and Their Meanings
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Table 4.1
Material Properties of Silicon and WBG Semiconductor Materials
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Figure 4.1
Depletion-type MOSFETs.
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Figure 4.2
Enhancement-type MOSFETs.
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Figure 4.3
Power MOSFETs. (Reproduced with permission from International Rectifier.)
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Figure 4.4
Cross sections of MOSFETs. [Ref. 10, G. Deboy]
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Figure 4.5
Transfer characteristics of MOSFETs.
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Equation 4.1
Steady-State Characteristics
• The transfer characteristics in Figure 4.5b
for n-channel enhancement MOSFETs can be used to determine the on-state drain current iD from [29]
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Figure 4.6
Output characteristics of enhancement-type MOSFET.
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Equations 4.2 and 4.3
Output Characteristics
• In the linear or ohmic region, the drain–
source νDS is low and the iD–νDS characteristic in Figure 4.6 can be described by the following relationship:
• which, for a small value of νDS ( VT), can
be approximated to
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Equation 4.4
Output Characteristics
• The load line of a MOSFET with a load
resistance RD as shown in Figure 4.7a can be described by
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Figure 4.7
Steady-state switching model of MOSFETs.
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Equation 4.6
Steady-state Switching Model
• The transconductance gain gm can be
determined from Eqs. (4.1) and (4.2) at the operating point at νGS = VGS and iD = ID as
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Equation 4.8
Steady-state Switching Model
• For a small value of vDS(
VT) in the linear or ohmic region, Eq. (4.3) gives the drain– source resistance RDS as
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Figure 4.8a–b
Parasitic model of enhancement of MOSFETs.
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Figure 4.8c
Parasitic model of enhancement of MOSFETs.
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Figure 4.9
Switching model of MOSFETs.
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Figure 4.10
Switching waveforms and times.
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Figure 4.11
Cross section of a single cell of a 10 A, 10-kV 4H-SiCD MOSFET.
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Figure 4.12
Parasitic devices of n-channel MOSFET [42].
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Figure 4.13
Cross section of an SiC power 6H-MOSFET [39].
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Figure 4.14
Cross section of COOLMOS.
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Figure 4.15
The linear relationship between blocking voltage and on-resistance. [Ref. 10, G. Deboy]
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Figure 4.16
Schematic and symbol of an n-channel JFET.
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Figure 4.17
Schematic and symbol of a p-channel JFET.
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Figure 4.18
Biasing of JFETs.
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Figure 4.19
Simplified n-channel JFET structure.
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Figure 4.20
Characteristics of an n-channel JFET.
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Equations 4.10 and 4.11
Characteristics of an n-channel JFET.
• The drain current iD can be expressed as
• which, for a small value of VDS (
can be reduced to
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|Vp|),
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Equations 4.12 and 4.13
Characteristics of an n-channel JFET.
• Substituting the limiting condition νDS =
νGS − Vp into Eq. (4.10) gives the drain current as
• The pinch-down locus can be obtained by
substituting νGS = VDS + Vp into Eq. (4.12):
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Figure 4.21
Cross section of the normally-on SiC LCJFET.
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Figure 4.22
A typical structure of a SiC vertical JFET.
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Figure 4.23
Cross section of the SiC VTJFET.
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Figure 4.24
Cross sections of SiC BGJFET and SiC DGTJFET.
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Figure 4.25
Bipolar transistors.
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Figure 4.26
NPN-transistors. (Courtesy of Powerex, Inc.)
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Figure 4.27
Cross sections of BJTs.
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Figure 4.28
Characteristics of NPN-transistors.
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Figure 4.29
Transfer characteristics.
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Figure 4.30
Model of NPN-transistors.
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Equations 4.14 and 4.15
Model of NPN-transistors
• The equation relating the currents is
• The ratio of the collector current IC to base
current IB is known as the forward current gain, βF :
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Equations 4.19 and 4.20
Model of NPN-transistors
• From Eqs. (4.14) and (4.16)
• Because βF
1, the collector current can be expressed as
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Equation 4.21
Model of NPN-transistors
• The constant αF is related to βF by
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Figure 4.31
Transistor switch.
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Equations 4.23 and 4.26
Transistor Switch
• Let us consider the circuit of Figure 4.31,
where the transistor is operated as a switch.
• The maximum collector current in the
active region, which can be obtained by setting VCB = 0 and VBE = VCE, is
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Equations 4.28 and 4.29
Transistor Switch
• If the collector–emitter saturation voltage
is VCE(sat), the collector current is
• and the corresponding value of base
current is
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Equations 4.30 and 4.31
Transistor Switch
• The ratio of IB to IBS is called the overdrive
factor (ODF):
• and the ratio of ICS to IB is called as forced
β, βforced where
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Figure 4.32
Transient model of BJT.
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Figure 4.33
Switching times of bipolar transistors.
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Figure 4.34
Charge storage in saturated bipolar transistors.
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Equations 4.33 and 4.34
Charge Storage
• The saturating charge, is proportional to
the excess base drive and the corresponding current Ie:
• and the saturating charge is given by
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Figure 4.35
Waveforms of transistor switch.
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Equations 4.35 and 4.36
Charge Storage
• The average power loss during the delay
time is
• During rise time, 0 ≤ t ≤ tr:
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Equations 4.37 and 4.38
Charge Storage
• The power Pc(t) is maximum when t = tm,
where
• and Eq. (4.36) yields the peak power
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Equation 4.44
Charge Storage
• This power loss during fall time is
maximum when t = tf /2 = 1.5 μs and Eq. (4.43) gives the peak power,
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Figure 4.36
Plot of instantaneous power for Example 4.2.
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Figure 4.37
Turn-on and turn-off load lines.
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Figure 4.38
Cross-sectional view of the 4H-SiC BJT device.
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Figure 4.39
Cross section and equivalent circuit for IGBTs.
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Figure 4.40
Symbol and circuit for an IGBT.
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Figure 4.41
Typical output and transfer characteristics of IGBTs.
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Figure 4.42
Simplified structure of a 4H-SiC p-channel IGBT.
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Figure 4.43
Cross section and symbol for SITs.
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Figure 4.44
Typical characteristics of SITs. [Ref. 18, 19]
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Table 4.2
Comparisons of Power Transistors
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Table 4.3
Operating Quadrants of Transistors with Diodes
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Table 4.3 (continued)
Operating Quadrants of Transistors with Diodes
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Table 4.3 (continued)
Operating Quadrants of Transistors with Diodes
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Figure 4.45
Thermal equivalent circuit of a transistor.
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Equation 4.50
Thermal equivalent circuit
• The ambient temperature is
and
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Figure 4.46
Voltage and current waveforms.
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Equations 4.51 and 4.52
Voltage and Current Waveforms
• During turn-on, the collector current rises
and the di/dt is
• During turn-off, the collector–emitter
voltage must rise in relation to the fall of the collector current, and dv/dt is
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Figure 4.47
Transistor switch with di/dt and dv/dt protection.
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Equations 4.53 and 4.54
di/dt and dv/dt Protection
• The equivalent circuit during turn-on is
shown in Figure 4.48a and turn-on di/dt is
• Equating Eq. (4.51) to Eq. (4.53) gives
the value of Ls,
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Equation 4.55
di/dt and dv/dt Protection
• The capacitor voltage appears across the
transistor and the dv/dt is
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Figure 4.48
Equivalent circuits.
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Equations 4.56 and 4.57
Equivalent Circuits
• Equating Eq. (4.52) to Eq. (4.55) gives
the required value of capacitance,
• For unity critical damping, δ = 1, and Eq.
(18.15) yields
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Figure 4.49
Discharge current of snubber capacitor.
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Equation 4.58
Discharge Current
• A discharge time of one-third the
switching period Ts is usually adequate.
or
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Figure 4.50
Parallel connection of transistors.
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Figure 4.51
Dynamic current sharing.
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Figure 4.52
PSpice BJT model.
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PSpice BJT Model
• The model statement for NPN-transistors
has the general form
• and the general form for PNP-transistors is
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PSpice BJT Model
• The symbol for a BJT is Q, and its name
must start with Q. The general form is
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Figure 4.53
PSpice n-channel MOSFET model.
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PSpice n-channel MOSFET Model
• The model statement of n-channel
MOSFETs has the general form
• and the statement for p-channel MOSFETs
has the form
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Figure 4.54
IGBT model. [Ref. 16, K. Shenai]
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Equation 4.61
IGBT model
• Cdg is expressed by
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Figure 4.55
Equivalent circuits of IGBT SPICE models. [Ref. 21, K. Sheng]
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Figure 4.56
Fast-turn-on gate circuit.
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Equations 4.62 and 4.63
Fast-turn-on Gate Circuit
• When the gate voltage is turned on, the
initial charging current of the capacitance is
• and the steady-state value of gate voltage
is
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Figure 4.57
Totem pole arrangement gate drive with pulse-edge shaping.
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Figure 4.58
Gate driver of the normally-on SiC JFET [43].
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Figure 4.59
Two-stage gate-drive unit for normally-off SiC JFETs [43].
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Figure 4.60
Two-stage gate drive for normally-off SiC JFETs [54].
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Figure 4.61
Base driver current waveform.
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Figure 4.62
Base current peaking during turn-on.
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Equations 4.65 and 4.66
Turn-on Control
• The final value of the base current is
• The capacitor C1 charges up to a final
value of
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Equation 4.67
Turn-on Control
• The charging time constant of the
capacitor is approximately
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Figure 4.63
Base current peaking during turn-on and turn-off.
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Figure 4.64
Proportional base drive circuit.
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Figure 4.65
Collector clamping circuit.
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Equations 4.69 and 4.72
Antisaturation Control
• The base current without clamping, which
is adequate to drive the transistor hard, can be found from
• The load current is
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Equation 4.74
Antisaturation Control
• From Eq. (4.72),
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Figure 4.66
Base drive with speed-up capacitor for a SiC BJT [43].
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Figure 4.67
Single-phase bridge inverter and gating signals.
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Figure 4.68
Gate voltage between gate and ground.
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Figure 4.69
Transformer-isolated gate drive.
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Figure 4.70
Optocoupler gate isolation.
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Figure 4.71
Power MOSFET connect to the high voltage rail side.
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