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CHAPTER 1
INTRODUCTION
One of the main form of communication that has been in use since 19th century is Radio Wave communication. Radio Waves have found its place in each and every field whether it be medical, electronics or space. In general it exists in every system in one or the other form. Our project demonstrate one such example were Radio Wave is employed in a way which is helpful to us. This project is designed and developed for helping the passengers traveling in train and bus especially during night. The people who are not aware of the station on which one should get down will find this very helpful. Here the station name is displayed and announced simultaneously when the station is about to reach which can assist both literate and illiterate. The RF technology is used in the project to communicate between the transmitter and receiver. Each transmitter has a unique binary code which is transmitted continuously to space in a particular range. This signal is captured by the receiver when it reaches in its range. So in the case of a train, the transmitter placed in the station is detected by the receiver in the train and the binary code is processed to give out the station name display. A LCD unit is used for displaying the station name.
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1.1. BLOCK DIAGRAM The block diagram consists of the transmitter and receiver section. They can be represented as the following block diagrams.
1.1.1. Transmitter
Fig. 1.1 Block Diagram of Transmitter Module
The block diagram of the transmitter is given in fig. 1.1. The main parts in the transmitter are: 1. Power Supply The power supply section is the section which provide +5V for the transmitter section to work. IC LM7805 is used for providing a constant power of +5V. 2. Encoder This section contains the identity of the transmitter. An encoder can be a device used to change a signal (such as a bit stream) or data into a code. The code serves any of a number of purposes such as compressing information for transmission or storage, encrypting or adding redundancies to the input code etc
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3. RF Transmitter This section transmits the binary data to space in a particular range based on the antenna used. This signal is received by the receiver and it compares the binary code to find the corresponding station name from the database.
1.1.2. Receiver
Fig. 1.2 Block Diagram of Receiver Module
1. Power Supply The power supply section is the section which provide +5V for the transmitter section to work. IC LM7805 is used for providing a constant power of +5V. 2. Decoder A decoder is a device which does the reverse of the encoder, undoing the encoding so that the original information can be retrieved. 3
3. Microcontroller
Unlike microprocessors, microcontrollers are generally optimized for specific applications. As a result the peripherals can be simplified and reduced which cuts down the production cost.
4. RF Receiver
The RF signal transmitted by the transmitter is detected and received by this section of the receiver. This binary encoder data is sent to the decoder for decoding the original data.
5. LCD
This is the output unit in the receiver section. The station name is displayed on this display unit when the receiver comes in the range of the transmitter.
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CHAPTER 2
PROJECT DESCRIPTION
2.1. INTRODUCTION RF based station name intimation is based traditionally on RF signal. RF signal at the frequency range 434 MHz is employed for communication between transmitter unit and receiver unit in our project. Each station is identified by a unique binary code, for example, 000 for ‘SANGRUR’ and 111 for ‘NEW DELHI’. This binary code is transmitted by transmitter module continuously at a frequency range of 434 MHz within a distance of 400 foot outdoor and 200 foot indoor. This distance can be enhanced by using additional RF antenna. When the receiver comes within the range of transmitter, it receives the data from the transmitter in the form of RF signal which is further decoded to collect the binary code and display the station name respectively.
2.2. TRANSMITTER MODULE Transmitter section is the smallest section having few components which include: 1. RF transmitter TWS-434 A 2. Encoded HT-12 E 3. Voltage Regulator LM7805. LM7805 assures a constant supply of +5 V for the transmitter module. This voltage of +5 V is used to drive transmitter and encoder.
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2.2.1. Circuit Description The third pin of TWS-434 A RF transmitter and 18th pin of Encoder HT-12E is connected to the output pin of Voltage Regulator LM7805 which drives the circuit with a constant voltage of 5V. The first pin of TWS-434 A and all the address bus are connected to second pin of LM7805 which represent ground. The first pin of voltage regulator receives a voltage of 9V from a battery source. The other connection include a connection between the Dout (7th pin) of HT-12 E and the data pin (2nd pin) of TWS-434 A.
Fig. 2.1 Circuit diagram of Transmitter Module
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2.2.2. Working Principle The binary values unique to each station are assigned by the encoder HT-12E. Each address/data input can be set to the logic state 0 or 1.Grounding the pin is taken as 0 while 1 can be achieved by giving 5V or leaving the pins open (No connection). So in order to get a binary value of 0001 only one pin is pulled high i.e. 13th pin (D11) is pulled high while pins 10, 11 and 12 are grounded to represent logical zero. On receipt of transmit enable i.e. TE-active (14th pin) is pulled low. The data which is here is the binary value is fed as input to the transmitter TWS-434 A from Dout (17th pin) along with header bits. Received data from HT-12E encoder is amplitude modulated and transmitted at a frequency range of 433.92 MHz.
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2.3. RECEIVER MODULE Receiver is the output section of the project. Receiver module includes the following components: 1. RF Receiver RWS-434 A 2. Microcontroller 89S52 which is regarded as the brain of the circuit. 3. LCD module for display the station name 4. Power supply section which contains transformer, rectifier, filter, regulator which ensures a constant +5V. Main function of the receiver unit is to detect the RF signal transmitted by the TWS-434A and give the response according to the received data from the receiver.
2.3.1. Circuit Description A constant voltage of +5V is applied to the 4th and 5th pin of the receiver, 2nd pin of the LCD module, 40th pin of Microcontroller 89S52 , 18th pin of the decoded IC HT-12D. It derives its input voltage from bridge rectifier. The 8 bit data pins D0 -D7
are used to send information
from port 2 of the microcontroller to the LCD. RS (register select) is one of the important registers inside the LCD. The RS pin is used for their selection as follows. If RS=0, the instruction code register is selected, allowing the user to send a command such as clear display, cursor at home, etc. if RS=1 the data register is selected, allowing the user to send data to be displayed on the LCD.R/W input pin of LCD allows the user to write information to the LCD or read information from it. R/W=1 when reading; R/W=0 when writing. E (enable) the enable pin is used by the LCD to latch information presented on its data pins. When data is supplied to data pins, a high to low pulse must be applied to this pin in order for the LCD to latch in the data present at the data pins. These 3 pins (RS, RW, and E) of LCD are connected to the 89S52 through port 0. The communication between AT 89S52 . Microcontroller receives data from decoder HT-12 D through port 1 which is an 8 bit bidirectional I/O port from the output data pins D8-D11 of HT-12 D. The receiver RWS-434 is connected to decoder such that the received RF signal is fed as input to the data input pin Din (pin 14) of the decoder from 2nd pin of the receiver. 8
Fig. 2.2 Circuit Diagram Receiver Module 9
2.3.2. Working Principle When the receiver unit comes in the range of transmitter unit which continuously transmit RF signal, the whole receiver unit gets activated. The receiver unit receives the RF signal at a frequency range of 434 MHz which actually is a digital data which includes the binary code assigned to the particular transmitter which denotes a station and a carrier signal. Digital output is taken from pin 2 of RWS-434 and received by decoder HT-12 D through data input pin (18th pin). The received serial input data are compared three times continuously with the local address. If no error or unmatched codes are found, the input codes are decoded and then transferred to the output pins. The VT (Valid Transmission) pin (12th pin) gives high to indicate a valid transmission. The decoded signal is given as data input to AT 89S52 at port 1. On receipt of the binary code microcontroller which act as a database of station name, compares the received binary code with its stored binary code, on no error or unmatched code the station name corresponding to the binary code is displayed on the LCD screen. The whole cycle will be repeated when the receiver receives a new set of binary code transmitted by some other transmitter denoting a different station. The display will be active only for pre defined duration, after which the LCD return to its ideal state. The data to be displayed on the LCD screen is available at port 2 and control of the register of the LCD is through port 3.
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CHAPTER 3 HARDWARE DESCRIPTION 3.1. RF TRANSMITTER The function of a radio frequency (RF) transmitter is to modulate, up convert, and amplify signals for transmission into free space. An RF transmitter generally includes a modulator that modulates an input signal and a radio frequency power amplifier that is coupled to the modulator to amplify the modulated input signal. The radio frequency power amplifier is coupled to an antenna that transmits the amplified modulated input signal. The RF transmitter used in our project is TWS-434A. This RF transmitter transmits data
in the
frequency range of 433.92 MHz with a range of approximately 400 foot (open area) outdoors. Indoors, the range is approximately 200 foot, and will go through most walls. TWS-434A has features which includes small in size, low power consumption i.e. 8mW and operate from 1.5 to 12 Volts- DC, excellent for applications requiring short-range RF signal. Data to be sent is Amplitude modulation with the carrier RF signal.
Fig. 3.1 Pin Description of RF Transmitter 11
3.1.1. Pin Description of Transmitter PIN 1: GROUND (-5V) PIN2: INPUT PIN FOR DATA FROM ENCODER PIN3: SUPPLY (+5V) PIN 4: PIN FOR EXTERNAL RF ANTENNA
3.2. RF RECEIVER The RF receiver receives an RF signal, converts the RF signal to an IF signal, and then converts the IF signal to a base band signal, which it then provides to the base band processor. As is also known, RF transceivers typically include sensitive components susceptible to noise and interference with one another and with external sources. The RF receiver is coupled to the antenna and includes a low noise amplifier, one or more intermediate frequency stages, a filtering stage, and a data recovery stage. The low noise amplifier receives an inbound RF signal via the antenna and amplifies it. The RF receiver used is RWS-434. This RF receiver receives RF signal which is in the frequency of 434.92 MHz and has a sensitivity of 3uV. The RWS-434 receiver operates from 4.5 to 5.5 voltsDC, and has both linear and digital outputs and its tunable to match the frequency of the transmitter unit
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. Fig. 3.2 Pin Description of RF Receiver
3.2.1. Pin Description of Receiver PIN1: GROUND (-5V) PIN2: OUTPUT PIN FOR DIGITAL DATA RECEIVED PIN 3: OUTPUT PIN FOR ANALOG DATA RECEIVED PIN4: SUPPLY (+5V) PIN5: SUPPLY (+5V) PIN6: GROUND (-5V PIN7: GROUND (-5V) PIN 8: PIN FOR EXTERNAL RF ANTENNA
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3.3. ENCODER An encoder can be a device used to change a signal (such as a bit stream) or data into a code. The code serves any of a number of purposes such as compressing information for transmission or storage, encrypting or adding redundancies to the input code, or translating from one code to another. This is usually done by means of a programmed algorithm, especially if any part is digital, while most analog encoding is done with analog circuitry. Encoder used here is HT 12E. The HT12E encoder is a CMOS IC It is capable of encoding 8 bits of address (A0-A7) and 4- bits of data (AD8-AD11) information. Each address/data input can be set to one of the two logic states, 0 or 1. Grounding the pins is taken as a 0 while a high can be given by giving +5V or leaving the pins open (no connection). Upon reception of transmit enable (TE-active low), the programmed address/data are transmitted together with the header bits via an RF medium.
Fig. 3.3 Pin Diagram of Encoder
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Pin A0~A7
I/O I
Description Input pins for address A0~A7 setting These pins can be externally set to VSS or left open
AD8~AD11
I
Input pins for address/data AD8~AD11 setting These pins can be externally set to VSS or left open
D8~D11
I
Input pins for data D8~D11 setting and transmission en- able, active low These pins should be externally set to VSS or left open
DOUT
0
Encoder serial transmission output
L/MB
I
Latch/Momentary transmission format selection pin: Latch: Floating or VDD Momentary: VSS
TE
I
Transmission enable, active low
OSC1
I
Oscillator input pin
OSC2
0
Oscillator output pin
X1
I
455kHz resonator oscillator input
X2
0
455kHz resonator oscillator output
VSS
I
Negative power supply, grounds
VDD
I
Positive power supply
Table. 3.1 Pin Description of Encoder 15
3.4. DECODER A decoder is a device which does the reverse of an encoder, undoing the encoding so that the original information can be retrieved. The same method used to encode is usually just reversed in order to decode. In digital electronics this would mean that a decoder is a multiple-input, multipleoutput logic circuit that converts coded inputs into coded outputs. Enable inputs must be on for the decoder to function, otherwise its outputs assume a single "disabled" output code word. Decoding is necessary in applications such as data multiplexing, 7 segment display and memory address decoding. The decoder used here is HT 12D. The HT12D is a decoder IC made especially to pair with the HT 12E encoder. It is a CMOS IC. The decoder is capable of decoding 8 bits of address (A0 - A7) and 4 bits of data (AD8- AD11) information. For proper operation, a pair of encoder/decoder with the same number of addresses and data format should be chosen. The decoders receive serial addresses and data from programmed encoders that are transmitted by a carrier using an RF or an IR transmission medium. They compare the serial input data three times continuously with their local addresses. If no error or unmatched codes are found, the input data codes are decoded and then transferred to the output pins. The VT pin also goes high to indicate a valid transmission. The decoders are capable of decoding information that consists of N bits of address and 12_N bits of data. Of this series, the HT 12D is arranged to provide 8 address bits and 4 data bits.
Fig. 3.3 Pin Diagram of Decoder 16
Pin
I/O
Description
Name A0~A7
I
(HT12D)
Input pins for address A0~A7 setting These pins can be externally set to VSS Or left open.
D8~D11
0
(HT12D)
Output data pins, poweron state is low
DIN
I
Serial data input pin
VT
0
Valid transmission, active high
OSC1
I
Oscillator input pin
OSC2
0
Oscillator output pin
VSS
Negative power supply, ground
Table. 3.2 Pin Description of Decoder
3.5. LCD MODULE A liquid crystal display (LCD) is an electronically-modulated optical device shaped into a thin, flat panel made up of any number of color or monochrome pixels filled with liquid crystals and arrayed in front of a light source (backlight) or reflector. It is often utilized in battery-powered electronic devices because it uses very small amounts of electric power. LCD has material which combines the 17
properties of both liquids and crystals. Rather than having a melting point, they have a temperature range within which the molecules are almost as mobile as they Would be in a liquid, but are grouped together in an ordered form similar to a crystal. LCD consists of two glass panels, with the liquid crystal materials sandwiched in between them. The inner surface of the glass plates is coated with transparent electrodes which define in between the electrodes and the crystal, which makes the liquid crystal molecules to maintain a defined orientation angle. When a potential is applied across the cell, charge carriers flowing through the liquid will disrupt the molecular alignment and produce turbulence. When the liquid is not activated, it is transparent. When the liquid is activated the molecular turbulence causes light to be scattered in all directions and the cell appears to be bright. Thus the required message is displayed. When the LCD is in the off state, the two polarizer’s and the liquid crystal rotate the light rays, such that they come out of the LCD without any orientation, and hence the LCD appears transparent. When sufficient voltage is applied to the electrodes the liquid crystal molecules would be aligned in a specific direction. The light rays passing through the LCD would be rotated by the polarizer, which would result in activating/highlighting the desired characters. The power supply should be of +5v, with maximum allowable transients of 10mv. Each row or column of the display has a single electrical circuit. The pixels are addressed one at a time by row and column addresses. This type of display is called passive-matrix addressed because the pixel must retain its state between refreshes without the benefit of a steady electrical charge. As the number of pixels (and correspondingly, columns and rows) increases, this type of display becomes less
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feasible. Very slow response times and poor contrast are typical of passive matrix addressed LCDs. A general purpose alphanumeric LCD, with two lines of 16 characters. So the type of LCD used in this project is16 characters * 2 lines with 5*7 dots with cursor, built in controller, +5v power supply, 1/16 duty cycle.
3.5.1. LCD Layout
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CHAPTER 4 MICROCONTROLLER Basically, a microcontroller is a device which integrates a number of the components of a microprocessor system onto a single microchip. So a microcontroller combines onto the same microchip. The following components: a) CPU Core b) Memory (Both RAM and ROM) c) Some Parallel Digital I/Os The microprocessor is the integration of a number of useful functions into a single IC package. Has the ability to execute a stored set of instructions to carry out user defined tasks; also has ability to access external memory chips to both read and write data from and to the memory. Essentially, a microcontroller is obtained by integrating the key components of microprocessor, RAM, ROM, and Digital I/O onto the same chip die. Modern microcontrollers also contain a wealth of other modules such as Serial I/O, Timers, and Analogue to Digital Converters. There are a large number of specialized devices with additional modules for specific needs. E.g. CAN controllers.
4.1. ATMEL 89S52 In our project we are using microprocessor from Atmel namely AT89S52 is a low-power, highperformance CMOS 8-bit microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry standard 80C51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highlyflexible and cost-effective solution to many embedded control applications.
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4.1.1. Pin Description of AT89S52
Fig. 4.1 Pin Diagram of AT89S52
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VCC - Supply voltage. GND - Ground.
PORT 0 Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs. Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.
PORT 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups Port 1 also receives the low-order address bytes during Flash programming and verification.
PORT 2 Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal pull- ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the highorder address bits and some control signals during Flash programming and verification.
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PORT 3 Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89S52 as listed below: Port 3 also receives some control signals for Flash programming and verification.
RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.
ALE/PROG Address Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN Program Store Enable is the read strobe to external program memory. When the AT8952 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.
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EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2 Output from the inverting oscillator amplifier.
4.2. OSCILLATOR CHARACTERISTICS XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.
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4.2.1. Oscillator Connections
Fig. 4.2 Oscillator Connections
4.3. SPECIAL FUNCTION REGISTERS A map of the on-chip memory area called the Special Function Register (SFR). Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect. User software should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0. SFRs are a kind of control table used for running and monitoring microcontroller’s operating. Each of these registers, even each bit they include, has its name, address in the scope of RAM and clearly defined purpose ( for example: timer control, interrupt, serial connection etc.). Even though there are 128 free memory locations intended for their storage, the basic core, shared by all types of 8051 controllers, has only 21 such registers. Rests of locations are intentionally left 25
free in order to enable the producers to further improved models keeping at the same time compatibility with the previous versions. It also enables the use of programs written a long time ago for the microcontrollers which are out of production now.
4.4. DATA MEMORY The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions which use direct Addressing access of the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H). MOV @R0, #data Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.
4.5. TIMER\COUNTERS The Atmel 80C51 Microcontrollers implement two general purpose, 16-bit timers/ Counters. They are identified as Timer 0 and Timer 1, and can be independently Configured to operate in a variety of modes as a timer or as an event counter. When Operating as a timer, the timer/counter runs for a programmed length of time, and then issues an interrupt request. When operating as a counter, the timer/counter counts negative transitions on an external pin. After a preset number of counts, the counter issues and interrupt request.
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4.5.1. Timer 0 & Timer 1 Timer 0 is controlled by the four lower bits of the TMOD register and bits 0, 1, 4 and 5 of the TCON register. TMOD register selects the method of timer gating (GATE0), timer or counter operation (T/C0#) and mode of operation (M10 and M00). The TCON register provides timer 0 control functions: overflow flag (TF0), run control bit (TR0), interrupt flag (IE0) and interrupt type control bit (IT0). For normal timer operation (GATE0= 0), setting TR0 allows TL0 to be incremented by the selected input. Setting GATE0 and TR0 allows external pin INT0# to control timer operation. Timers 0 overflow (count rolls over from all 1s to all 0s) sets TF0 flag, generating an interrupt request. It is important to stop timer/counter before changing mode.
4.5.2. Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency. In the Counter function, the register is incremented in response to a 1-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle
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CHPTER 5
SOFTWARE DESCRIPITION
5.1. EMBEDDED LANGUAGE
Embedded software is in almost every electronic device designed today. There is software hidden away inside our watches, microwave, Music system, cellular phones etc .military uses embedded software to guide smart missiles and detect enemy aircraft; communication satellites, space probes and modern medicine could be nearly impossible without it. Embedded software are developed using a different version of c called embedded c which is a different version of c to suit the programming of microcontroller.
5.2. INTRODUCTION TO MULTISIM 11
Multisim is an industry-standard, best-in-class SPICE simulation environment. It is the cornerstone of the NI circuits teaching solution to build expertise through practical application in designing, prototyping, and testing electrical circuits. The Multisim design approach helps you save prototype iterations and optimize printed circuit board (PCB) designs earlier in the process. The Multisim simulator is software simulation tools which provide an accurate simulation of digital and analog circuit operations. Multisim allows us to grasp concepts quicker and gain deeper intuition for circuits. The operating system windows XP/ Vista / 64bit Vista and windows 7 supports fully to this Multisim software. It has been designed to help hardware designers’ gain better understanding of circuit behavior. Since the quality of simulation results is highly dependent on applied signals as well as the methods of analyzing and displaying simulation. It helps to close gap between design and test. We can interface real world signal from inside Multisim and output data to drive real world circuitry, or display simulation data in a more suitable to our needs. Using this software we can design our project before it is executed on real components. The purpose of this paper is to explore the important features of this software by 28
giving a complete example of interfacing LCD display to 8051 microcontroller. As 8051chip and its family is extensively used in embedded system design and in many embedded applications. And LCD display is most commonly used in embedded system and other electronic devices. Microcontrollers and LCD modules are used in various embedded application s such as copiers fax machines, laser printers industrial test equipment, network equipment: routers and storage devices. We can do many experiments or projects placing various components on workplace area of
Multisim
software
on
a
PC,
do
connections,
write
the
assembly
language program, debug it and run the same to see the result on output devicesconnected.
The
best way to learn is to experiment; there is no need to afraid to try out complicated circuits and new features in Multisim. So beginner can easy simulate complex circuits. One of the most powerful features of is its interactive nature. It enhances visualization, and makes capture easier.
Fig. 5.1 Multisim 11 screen window
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5.3. Proteus (design software) Proteus is software for microprocessor simulation, schematic capture, and printed circuit board (PCB) design. It is developed by Labcenter Electronics. PROTUES combines advanced schematic capture, mixed mode SPICE simulation, PCB layout and auto routing to make a complete
electronic
design
system.
The PROTUES product
range
also
includes
revolutionary VSM technology, which allows you to simulate micro-controller based design, complete with all the surrounding electronic. Intelligent Schematic Input System (ISIS) lies right at the heart of the PROTUES system and is far more than just another schematic package. It has powerful environment to control most aspects of the drawing appearance. Whether your requirement is the rapid entry of complex design for simulation & PCB layout, Or the creation of attractive Schematic for publication ISIS is the right tool for the job Product Features. VSM (Virtual System Modelling) -Proteus VSM is an extension of the PROSPICE simulator that facilities co-simulation of microprocessor based design including all the associated electronics. Furthermore, you can interact with the microcontroller software through the use of animated keypads, switches, buttons, LEDs, lamps and even LCD displays.
Fig. 5.2 Proteus main window 30
CHAPTER 6
CONCLUSION AND FEATURE The design and development of RF based station name intimation inside train compartment have been successfully designed, fabricated and tested. With the implementation of low cost and flexibility in design, this kit can reduce our tension in journey to unknown place. This project demonstrates how RF signal along with embedded system can make our life simpler without causing any ill effect or affecting other devices. There are plenty of such examples showing how embedded system makes our life simpler and tension free. Our project has plenty of rooms for expansion like the use of GPS system instead of RF signal, interfacing with pc for different forms of output, harness of solar energy as the unit consumes very low power etc. Its use is not limited to bus stand or railway station, with suitable modification the system can be used to serve other purposes like providing assistance to blind in their homes, providing security for valuable items etc. No radio frequency interference (RFI) to the existing terrestrial wireless systems. We have used 434MHz frequency band for the data transmission, which is specially allotted for experimental purpose. Digital transmissions make more efficient use of spectrum and have better threshold margins. Digital modulations are more robust, are error free, and predictable under most conditions. Coverage range up to 100 feets.
31
REFERENCES
1. Ajay V Deshmukh (2008), ‘Microcontrollers (Theory and Applications)’, Tata McGraw Hill Publishing Limited. 2. Muhammad Ali Mazidi and Janice Mazidi F (2000), ‘051 microcontroller and embedded system’, Pearson education. 3. Ray and Bhuruchandi (2000), ‘Advanced Microprocessor and Peripherals’, Tata McGraw Hill Publishing Company Limited.
4. Websites:
1. www.atmel.com 2. www.rentron.com 3.
www.vbook.pub.com
4. www.datasheetarchive.com
32
APPENDIX List File of the Program-
1
$MOD51
0087
2
rs equ P0.7
0086
3
en equ P0.6
0090
4
vt equ P1.0
5 0000
6
org 0000h
0000 7400
7
mov a,#00h
0002 F5A0
8
mov p2,a
0004 90014C
9
mov dptr,#lcd_mycmnd
0007 310F
10
acall c1
0009 E5FF
11
mov a,0ffh
000B F590
12
mov p1,a
000D 30945B
13
again:jnb P1.4,project_info
0010 30900B
14
jnb vt,lcd_m1
0013 1136
15
acall chk_in
0015 3119
16
acall d1
0017 2090FD
17
back:jb vt,back
001A 3142
18
acall clr_dsply
001C 80EF
19
sjmp again
20 21 001E
22
lcd_m1:
001E 900151
23
mov dptr,#lcd_dsplay
0021 3119
24
acall d1
0023 3142
25
acall clr_dsply
0025 900162
26
mov dptr,#lcd_display1
0028 3119
27
acall d1 33
002A 3147
28
acall l2
002C 900173
29
mov dptr,#lcd_dsply12
002F 3119
30
acall d1
0031 3142
31
acall clr_dsply
0033 80D8
32
sjmp again
0035 22
33
ret
34 0036
35
chk_in:
0036 20910A
36
jb P1.1,chk_b0
0039 209211
37
jb P1.2,chk_b1
003C 209315
38
jb P1.3,chk_b2
003F 90030B
39
mov dptr,#lcd_dsply0
0042 22
40
ret
0043
41
chk_b0:
0043 209212
42
jb P1.2,chk_b3
0046 209316
43
jb P1.3,chk_b4
0049 90031C
44
mov dptr,#lcd_dsply1
004C 22
45
ret
004D
46
chk_b1:
004D 209313
47
jb P1.3,chk_b5
0050 90032D
48
mov dptr,#lcd_dsply2
0053 22
49
ret
0054
50
chk_b2:
0054 90033E
51
mov dptr,#lcd_dsply3
0057 22
52
ret
0058
53
chk_b3:
0058 20930C
54
jb P1.3,chk_b6
005B 90034F
55
mov dptr,#lcd_dsply4
005E 22
56
ret
005F
57
chk_b4:
005F 900360
58
mov dptr,#lcd_dsply5 34
0062 22
59
ret
0063
60
chk_b5:
0063 900371
61
mov dptr,#lcd_dsply6
0066 22
62
ret
0067
63
chk_b6:
0067 900382
64
mov dptr,#lcd_dsply7
006A 22
65
ret
66 006B
67
project_info:
006B 900184
68
mov dptr,#info1
006E 3119
69
acall d1
0070 3142
70
acall clr_dsply
0072 900195
71
mov dptr,#info2
0075 3119
72
acall d1
0077 3147
73
acall l2
0079 9001A6
74
mov dptr,#info21
007C 3119
75
acall d1
007E 3142
76
acall clr_dsply
0080 9001B7
77
mov dptr,#info3
0083 3119
78
acall d1
0085 3147
79
acall l2
0087 9001C8
80
mov dptr,#info31
008A 3119
81
acall d1
008C 3142
82
acall clr_dsply
008E 9001D9
83
mov dptr,#info4
0091 3119
84
acall d1
0093 3142
85
acall clr_dsply
0095 9001EA
86
mov dptr,#info5
0098 3119
87
acall d1
009A 3147
88
acall l2
009C 9001FB
89
mov dptr,#info51 35
009F 3119
90
acall d1
00A1 3142
91
acall clr_dsply
00A3 90020C
92
mov dptr,#info6
00A6 3119
93
acall d1
00A8 3147
94
acall l2
00AA 90021D
95
mov dptr,#info61
00AD 3119
96
acall d1
00AF 3142
97
acall clr_dsply
00B1 90022E
98
mov dptr,#info7
00B4 3119
99
acall d1
00B6 3147
100
acall l2
00B8 90023F
101
mov dptr,#info71
00BB 3119
102
acall d1
00BD 3142
103
acall clr_dsply
00BF 900250
104
mov dptr,#info8
00C2 3119
105
acall d1
00C4 3142
106
acall clr_dsply
00C6 900261
107
mov dptr,#info9
00C9 3119
108
acall d1
00CB 3147
109
acall l2
00CD 900272
110
mov dptr,#info91
00D0 3119
111
acall d1
00D2 3142
112
acall clr_dsply
00D4 900283
113
mov dptr,#info10
00D7 3119
114
acall d1
00D9 3147
115
acall l2
00DB 900294
116
mov dptr,#info101
00DE 3119
117
acall d1
00E0 3142
118
acall clr_dsply
00E2 9002A5
119
mov dptr,#info11 36
00E5 3119
120
acall d1
00E7 3147
121
acall l2
00E9 9002B6
122
mov dptr,#info111
00EC 3119
123
acall d1
00EE 3147
124
acall l2
00F0 9002C7
125
mov dptr,#info12
00F3 3119
126
acall d1
00F5 3142
127
acall clr_dsply
00F7 9002D8
128
mov dptr,#info13
00FA 3119
129
acall d1
00FC 3147
130
acall l2
00FE 9002E9
131
mov dptr,#info131
0101 3119
132
acall d1
0103 3147
133
acall l2
0105 9002FA
134
mov dptr,#info14
0108 3119
135
acall d1
010A 3142
136
acall clr_dsply
010C 02000D
137
ljmp again
138 010F
139
c1:
010F E4
140
clr a
0110 93
141
movc a,@a+dptr
0111 3123
142
acall lcd_cmdwr
0113 3139
143
acall delay
0115 A3
144
inc dptr
0116 70F7
145
jnz c1
0118 22
146
ret
147 0119
148
d1:
0119 E4
149
clr a
011A 93
150
movc a,@a+dptr 37
011B 312E
151
acall lcd_datawr
011D 3139
152
acall delay
011F A3
153
inc dptr
0120 70F7
154
jnz d1
0122 22
155
ret
156 0123
157
lcd_cmdwr:
0123 F5A0
158
mov P2,a
0125 C287
159
clr rs
0127 D286
160
setb en
0129 3139
161
acall delay
012B C286
162
clr en
012D 22
163
ret
164 012E
165
lcd_datawr:
012E F5A0
166
mov P2,a
0130 D287
167
setb rs
0132 D286
168
setb en
0134 3139
169
acall delay
0136 C286
170
clr en
0138 22
171
ret
172 173 0139
174
delay:
0139 78FB
175
mov r0,#251
013B 79FB
176
v2: mov r1,#251
013D D9FE
177
v1:djnz r1,v1
013F D8FA
178
djnz r0,v2
0141 22
179
ret
180 0142
181
clr_dsply: 38
0142 7401
182
mov a,#01h
0144 3123
183
acall lcd_cmdwr
0146 22
184
ret
185 0147
186
l2:
0147 74C0
187
mov a,#0c0h
0149 3123
188
acall lcd_cmdwr
014B 22
189
ret
190 191 014C
192
lcd_mycmnd:
014C 01380C06
193
db 01h,38h,0ch,06h,00h
0150 00 194 0151
195
lcd_dsplay:
0151 2057454C
196
db ' WELCOME TO PRTC',00h
0162
197
lcd_display1:
0162 53414E47
198
db 'SANGRUR-NEWDELHI',00h
0173
199
lcd_dsply12:
0173 20202042
200
db '
0155 434F4D45 0159 20544F20 015D 50525443 0161 00
0166 5255522D 016A 4E455744 016E 454C4849 0172 00 BUS SERVICE
',00h
0177 55532053 017B 45525649 017F 43452020 39
0183 00 201 0184
202
info1:
0184 20534C49
203
db ' SLIET LONGOWAL ',00h
0195
204
info2:
0195 2046494E
205
db ' FINAL SEMESTER ',00h
01A6
206
info21:
01A6 20202020
207
db '
01B7
208
info3:
01B7 52462042
209
db 'RF BASED STATION',00h
01C8
210
info31:
01C8 20204E41
211
db '
0188 4554204C 018C 4F4E474F 0190 57414C20 0194 00
0199 414C2053 019D 454D4553 01A1 54455220 01A5 00 PROJECT
',00h
01AA 50524F4A 01AE 45435420 01B2 20202020 01B6 00
01BB 41534544 01BF 20535441 01C3 54494F4E 01C7 00 NAME DISPLAY
',00h
01CC 4D452044 01D0 4953504C 01D4 41592020 40
01D8 00 01D9
212
info4:
01D9 5375626D
213
db 'Submitted By -
01EA
214
info5:
01EA 53414348
215
db 'SACHIN KUMAR JHA',00h
01FB
216
info51:
01FB 20202047
217
db '
020C
218
info6:
020C 2052414A
219
db ' RAJNISH RANJAN ',00h
021D
220
info61:
021D 20202047
221
db '
',00h
01DD 69747465 01E1 64204279 01E5 202D2020 01E9 00
01EE 494E204B 01F2 554D4152 01F6 204A4841 01FA 00 GEC-105172
',00h
01FF 45432D31 0203 30353137 0207 32202020 020B 00
0210 4E495348 0214 2052414E 0218 4A414E20 021C 00 GEC-105161
',00h
0221 45432D31 0225 30353136 0229 31202020 022D 00 41
022E
222
info7:
022E 56495645
223
db 'VIVEK KR RANJAN ',00h
023F
224
info71:
023F 20202047
225
db '
0250
226
info8:
0250 50726F6A
227
db 'Project Guide - ',00h
0261
228
info9:
0261 2045722E
229
db ' Er. SHWETA RANI',00h
0272
230
info91:
0272 20284150
231
db ' (AP ECE DEPT.) ',00h
232
info10:
0232 4B204B52 0236 2052414E 023A 4A414E20 023E 00 GEC-105170
',00h
0243 45432D31 0247 30353137 024B 30202020 024F 00
0254 65637420 0258 47756964 025C 65202D20 0260 00
0265 20534857 0269 45544120 026D 52414E49 0271 00
0276 20454345 027A 20444550 027E 542E2920 0282 00 0283
42
0283 50726F6A
233
db 'Project Co-ordin',00h
0294
234
info101:
0294 61746F72
235
db 'ator -
02A5
236
info11:
02A5 2044722E
237
db ' Dr. S S SODHI
02B6
238
info111:
02B6 28417373
239
db '(Associ. Prof.) ',00h
02C7
240
info12:
02C7 45434520
241
db 'ECE DEPT. SLIET ',00h
02D8
242
info13:
02D8 204D722E
243
db ' Mr. J SINGH
0287 65637420 028B 436F2D6F 028F 7264696E 0293 00 ',00h
0298 202D2020 029C 20202020 02A0 20202020 02A4 00 ',00h
02A9 20532053 02AD 20534F44 02B1 48492020 02B5 00
02BA 6F63692E 02BE 2050726F 02C2 662E2920 02C6 00
02CB 44455054 02CF 2E20534C 02D3 49455420 02D7 00 ',00h 43
02DC 204A2053 02E0 494E4748 02E4 20202020 02E8 00 02E9
244
info131:
02E9 28417373
245
db '(Asst. Prof.)
02FA
246
info14:
02FA 45434520
247
db 'ECE DEPT. SLIET ',00h
',00h
02ED 742E2050 02F1 726F662E 02F5 29202020 02F9 00
02FE 44455054 0302 2E20534C 0306 49455420 030A 00 248 249 030B
250
lcd_dsply0:
030B 20202020
251
db '
031C
252
lcd_dsply1:
031C 20202020
253
db '
254
lcd_dsply2:
SANGRUR
',00h
030F 53414E47 0313 52555220 0317 20202020 031B 00 PANIPAT
',00h
0320 50414E49 0324 50415420 0328 20202020 032C 00 032D
44
032D 20202020
255
db '
PATIALA
033E
256
lcd_dsply3:
033E 20204248
257
db '
034F
258
lcd_dsply4:
034F 20202020
259
db '
0360
260
lcd_dsply5:
0360 20202020
261
db '
0371
262
lcd_dsply6:
0371 20202020
263
db '
0382
264
lcd_dsply7:
0382 2020204E
265
db '
',00h
0331 50415449 0335 414C4120 0339 20202020 033D 00 BHAWANIGARH
',00h
0342 4157414E 0346 49474152 034A 48202020 034E 00 KARNAL
',00h
0353 204B4152 0357 4E414C20 035B 20202020 035F 00 SONIPAT
',00h
0364 534F4E49 0368 50415420 036C 20202020 0370 00 AMBALA
',00h
0375 20414D42 0379 414C4120 037D 20202020 0381 00 NEW DELHI
',00h 45
0386 45572044 038A 454C4849 038E 20202020 0392 00 266 267 268
END
VERSION 1.2k ASSEMBLY COMPLETE, 0 ERRORS FOUND AGAIN. . . . . . . . . . . . . .
C ADDR
000DH
BACK . . . . . . . . . . . . . .
C ADDR
0017H
C1 . . . . . . . . . . . . . . .
C ADDR
010FH
CHK_B0 . . . . . . . . . . . . .
C ADDR
0043H
CHK_B1 . . . . . . . . . . . . .
C ADDR
004DH
CHK_B2 . . . . . . . . . . . . .
C ADDR
0054H
CHK_B3 . . . . . . . . . . . . .
C ADDR
0058H
CHK_B4 . . . . . . . . . . . . .
C ADDR
005FH
CHK_B5 . . . . . . . . . . . . .
C ADDR
0063H
CHK_B6 . . . . . . . . . . . . .
C ADDR
0067H
CHK_IN . . . . . . . . . . . . .
C ADDR
0036H
CLR_DSPLY. . . . . . . . . . . .
C ADDR
0142H
D1 . . . . . . . . . . . . . . .
C ADDR
0119H
DELAY. . . . . . . . . . . . . .
C ADDR
0139H
EN . . . . . . . . . . . . . . .
NUMB
0086H
INFO1. . . . . . . . . . . . . .
C ADDR
0184H
INFO10 . . . . . . . . . . . . .
C ADDR
0283H
INFO101. . . . . . . . . . . . .
C ADDR
0294H
INFO11 . . . . . . . . . . . . .
C ADDR
02A5H
INFO111. . . . . . . . . . . . .
C ADDR
02B6H
INFO12 . . . . . . . . . . . . .
C ADDR
02C7H 46
INFO13 . . . . . . . . . . . . .
C ADDR
02D8H
INFO131. . . . . . . . . . . . .
C ADDR
02E9H
INFO14 . . . . . . . . . . . . .
C ADDR
02FAH
INFO2. . . . . . . . . . . . . .
C ADDR
0195H
INFO21 . . . . . . . . . . . . .
C ADDR
01A6H
INFO3. . . . . . . . . . . . . .
C ADDR
01B7H
INFO31 . . . . . . . . . . . . .
C ADDR
01C8H
INFO4. . . . . . . . . . . . . .
C ADDR
01D9H
INFO5. . . . . . . . . . . . . .
C ADDR
01EAH
INFO51 . . . . . . . . . . . . .
C ADDR
01FBH
INFO6. . . . . . . . . . . . . .
C ADDR
020CH
INFO61 . . . . . . . . . . . . .
C ADDR
021DH
INFO7. . . . . . . . . . . . . .
C ADDR
022EH
INFO71 . . . . . . . . . . . . .
C ADDR
023FH
INFO8. . . . . . . . . . . . . .
C ADDR
0250H
INFO9. . . . . . . . . . . . . .
C ADDR
0261H
INFO91 . . . . . . . . . . . . .
C ADDR
0272H
L2 . . . . . . . . . . . . . . .
C ADDR
0147H
LCD_CMDWR. . . . . . . . . . . .
C ADDR
0123H
LCD_DATAWR . . . . . . . . . . .
C ADDR
012EH
LCD_DISPLAY1 . . . . . . . . . .
C ADDR
0162H
LCD_DSPLAY . . . . . . . . . . .
C ADDR
0151H
LCD_DSPLY0 . . . . . . . . . . .
C ADDR
030BH
LCD_DSPLY1 . . . . . . . . . . .
C ADDR
031CH
LCD_DSPLY12. . . . . . . . . . .
C ADDR
0173H
LCD_DSPLY2 . . . . . . . . . . .
C ADDR
032DH
LCD_DSPLY3 . . . . . . . . . . .
C ADDR
033EH
LCD_DSPLY4 . . . . . . . . . . .
C ADDR
034FH
LCD_DSPLY5 . . . . . . . . . . .
C ADDR
0360H
LCD_DSPLY6 . . . . . . . . . . .
C ADDR
0371H
LCD_DSPLY7 . . . . . . . . . . .
C ADDR
0382H 47
LCD_M1 . . . . . . . . . . . . .
C ADDR
001EH
LCD_MYCMND . . . . . . . . . . .
C ADDR
014CH
P0 . . . . . . . . . . . . . . .
D ADDR
0080H
PREDEFINED
P1 . . . . . . . . . . . . . . .
D ADDR
0090H
PREDEFINED
P2 . . . . . . . . . . . . . . .
D ADDR
00A0H
PREDEFINED
PROJECT_INFO . . . . . . . . . .
C ADDR
006BH
RS . . . . . . . . . . . . . . .
NUMB
0087H
V1 . . . . . . . . . . . . . . .
C ADDR
013DH
V2 . . . . . . . . . . . . . . .
C ADDR
013BH
VT . . . . . . . . . . . . . . .
NUMB
0090H
48