Crystal Defects, Growth And Epitaxy

Lecture 4 Crystal defects Crystal growth and epitaxy Processing

ELEC-E3140 Semiconductor physics

Outline Crystal defects Crystal growth and epitaxy Processing

ELEC-E3140 Semiconductor physics

Crystal defects In practise, crystals are never perfect. Crystal defects affect the material properties in many ways. Crystal defects can be divided based on their dimensionality: 1) Point defects (0-D) 2) Line defects (1-D) 3) Planar defects (2-D)

4) Volume defects (3-D)

ELEC-E3140 Semiconductor physics

Point defects Different types of point defects and their notation (silicon as example) 1) 2) 3) 4) 5)

Vacancy (VSi) Self-interstitial (Sii) Impurity interstitial (Bi) Impurity (small, BSi) Impurity (large, PSi)

In addition, if the lattice contains naturally different atoms (as GaAs), an antisite defect can form. E.g., Gallium at arsenic site is labeled GaAs.

ELEC-E3140 Semiconductor physics

Complexes and strain fields Impurity atoms can be inserted in semiconductors delibarately to dope the semiconductor. They are called dopants, and are divided into donors (n-doping) and acceptors (p-doping). Two or several point defects next to each other can form complexes or clusters. E.g., a Ga atom ”jumping” from the lattice site to an interstitial position (called Frenckel pair). The effect of point defects is mainly based on their charge and strain field created around the defect (see below).

distortion of planes

Vacancy

distortion of planes

selfinterstitial

ELEC-E3140 Semiconductor physics

Dislocations Line defects (1-D) are most often dislocations. The two types of dislocations are called edge dislocation (left) and screw dislocation (right). Dislocations are usually very detrimental in crystals affecting electrical and optical properties, and causing enhanced diffusion of impurities along the dislocations.

ELEC-E3140 Semiconductor physics

Dislocation imaging

Dislocations can imaged by, e.g., transmission electron microscopy (TEM, above) or x-ray topography.

ELEC-E3140 Semiconductor physics

Planar and volume defects Examples of planar defects (2-D) are grain boundaries in polycrystalline materials (left), anti-phase domain boundaries (APDs, right), and stacking faults. Examples of volume defects (3-D) are voids (empty spaces), amorphic regions, inclusions, and precipitates (impurity clusters).

grain boundaries

ELEC-E3140 Semiconductor physics

Outline Crystal defects Crystal growth and epitaxy Processing

ELEC-E3140 Semiconductor physics

Bulk crystal growth: Czochralski method Czochralski = crystal pulling method

Seed Single crystal Quartz crucible Water cooled chamber Heat shield Carbon heater Graphite crucible Crucible support Spill tray Electrode • Standard technique for Si, InP, GaAs, GaSb, InSb, InAs and GaP growth. • For III-V, liquid encapsulation is required to prevent the evaporation of the V-element = Liquid Encapsulation Czochralski (LEC).

ELEC-E3140 Semiconductor physics

Float Zone (FZ) method - More expensive (slow method) - Better quality, less impurities - Higher resistivity possible

ELEC-E3140 Semiconductor physics

Bridgman method

• Growth on the seed from a melt in a furnace ( Tseed < Tmelt) • TºC and pressure condition sets the vapour pressure for As • Low vapour pressure system only Good for GaAs, CdTe growth Impossible for InP and GaP

ELEC-E3140 Semiconductor physics

Preparation of silicon wafers 1. Crystal Growth

Polysilicon

Seed crystal

6. Edge Rounding

Crucible

Heater

2. Single Crystal Ingot

7. Lapping

3. Crystal Trimming and Diameter Grind

8. Wafer Etching

Slurry

4. Flat Grinding

Polishing head

9. Polishing Polishing table

5. Wafer Slicing

10.Wafer Inspection

ELEC-E3140 Semiconductor physics

Epitaxy

ELEC-E3140 Semiconductor physics

Liquid phase epitaxy (LPE) LPE liquid phase epitaxy - Simple and inexpensive, rarely used nowadays - Thick layers quickly from molten sources - Horizontal graphite boat, substrate is moved under the melt bins - Process close to thermodynamical equilibrium - Interfaces between materials are not accurate

ELEC-E3140 Semiconductor physics

Vapor phase epitaxy VPE vapor phase epitaxy - Gases/vapors as source materials, dissociation and chemical reactions

close to heated substrate - Thick layers quickly - Thickness control, thin layers problematic

ELEC-E3140 Semiconductor physics

Hydride and Halide Vapor Phase Epitaxy

©Challentech International Corp.

Near-equilibrium technique, growth rate determined by the mass input rate of the reactants  high growth rates (> 10 µm/h)

Cl-VPE: Group V precursors are halides (Ex: AsCl3, PCl3) HVPE: Group V precursors are hydrides (Ex: AsH3, PH3) Note: Al and Sb compounds difficult to grow with this method ELEC-E3140 Semiconductor physics

Modern epitaxy methods Modern epitaxial techniques - good control of layers thickness d and composition needed (Dd < 1Å) MBE (molecular beam epitaxy) - ultra-high vacuum - like vacuum evaporation - often solid sources - several systems in Tampere, one in Micronova

MOVPE or MOCVD (metalorganic vapor As phase epitaxy) - sources vapors or gases - three systems in Micronova

P

Ga

Al In

ELEC-E3140 Semiconductor physics

Molecular Beam Epitaxy (MBE)

© www.atweiwei.net

• Growth by effusion of the precursors onto the sample under ultrahigh vacuum (10-6-10-7 Torr) (1 Torr = 103 atm, deep space: 10-17 Torr)

• The substrate is heated up to enhance atom diffusion on the surface • The walls of the chamber are cooled to trap excess reactants • The growth can be interrupted abruptly by closing shutters front of the effusion cells

ELEC-E3140 Semiconductor physics

©Tanwin Chang, NBER

Molecular Beam Epitaxy (MBE)

ELEC-E3140 Semiconductor physics

Molecular Beam Epitaxy (MBE) To rotation motor and substrate heater Helium cooled shroud

RHEED gun

Ionization gauge Gate valve

Effusion cells, (or gas cracker cells or injectors)

Fork

Viewport Fluorescent screen

Substrate

Quadrupole mass spectrometer

ELEC-E3140 Semiconductor physics

Molecular Beam Epitaxy (MBE) Slow but accurate!

© Centre for Electron Microscopy of TASC

Slow growth (~0.1-1μm/hour) and low contamination level allow sharp material transition (over one monolayer!)

GaAs

ZnSe

Also MBE ZnSe growth at TKK

20nm 200nm SiO2/Si lattices (non-crystalline growth)

ELEC-E3140 Semiconductor physics

MBE at Micronova

ELEC-E3140 Semiconductor physics

Reflection High-Energy Electron Diffraction

Electron Monolayer growth beam

RHEED signal

ELEC-E3140 Semiconductor physics

Knudsen effusion cell Molecular flux onto the substrate:

Angle between beam and normal to substrate

Area of the cell aperture

•

 A cos    subst.    d 2  cell s  

Molecular flux from the cell Distance of the cell from the substrate

Group V elements stick on the surface only in presence of Group III elements

Growth rate limited by the flux of group III (provided that group V is in excess)

ELEC-E3140 Semiconductor physics

Molecular flux Molecular flux onto the substrate as a function of partial pressure

F

P 2 mk T B

• This applies to both VPE and MBE

ELEC-E3140 Semiconductor physics

ELEC-E3140 Semiconductor physics Lecture quiz 3

Time: 5 minutes

Metalorganic Vapor Phase Epitaxy (MOVPE=OMVPE=OMCVD=MOCVD) • Source materials are metal organics (ex: Ga(CH3)3, In(CH3)3). The bond between metal and organics is weak and can be broken by temperature above ~400 °C • Normal growth temperatures 500-800°C  diffusion limited growth regime • Trimethylgallium (TMGa) pyrolysis reaction: Ga(CH3)3 Ga(CH3)2 + CH3 Ga(CH3)2 Ga(CH3) + CH3 Ga(CH3) Ga + CH3

ELEC-E3140 Semiconductor physics

Metalorganic Vapour Phase Epitaxy

• Growth rate: ~1 μm/h • Cold wall reactor

Allows quantum structure growth Less contamination by parasitic reactions on reactor walls

ELEC-E3140 Semiconductor physics

MOVPE of GaAs III-V growth (on the substrate) (CH3)3Ga(g) + (C4H9)H2As(g) + H2(g)

Reactor

Reactor door

H2

H2 MFC

MFC

Substrate

MFC

Carrier gas Bubbler

SiH4 TMGa

Scrubber Thermocouple

TMGa = trimethylgallium TBA = tertiarybutylarsine

TBA

650ºC

GaAs(s) + 3CH4(g) + C4H10(g)

ELEC-E3140 Semiconductor physics

• Group III TMGa, TEGa TMAl, TEAl TMIn, TEIn • Group V TBP TBAs, AsH3 • Dopants DEZn, SiH4, Mg(C5H5)2

Choice of the precursors relies on several criteria: • Purity • Toxicity • Price • Vapor pressure • Decomposition T

Precursor bubblers are kept in temperature controlled baths. The bath temperature determines the vapor pressure of the precursor.

200g TMG bottle costs 3000€

http://www.epichem.com/metalorganics/safety/hsguide.html

MOVPE precursors

ELEC-E3140 Semiconductor physics

Optical in-situ monitoring • Reflectance measurement

• Fabry-Perot oscillations layer thickness or refractive index n • n  growth rate  composition • Absorption taken into account by the Imaginary part of the complex refractive index • Optical ports for optical fibers are located on top of the reactor

• Halogen lamp as a light source, 635 nm

www.laytec.de

ELEC-E3140 Semiconductor physics

MOVPE at Micronova

Three MOVPE systems for GaAs-, InP- and GaN-based materials

ELEC-E3140 Semiconductor physics

Comparison of epitaxy methods LPE

MBE HVPE, Cl-VPE MOVPE

+ Cheap + Fast growth

+ Control of doping and

- Only simple structures - Poor layer thickness control

- Slow growth

composition at the monolayer level

+ Fast growth

+ Fairly good doping and composition control + Low contamination

- Poisonous precursors - Quantum structures difficult - Al- and Sb-compounds difficult to grow

- Poisonous precursors ELEC-E3140 Semiconductor physics

Comparison of epitaxy methods LPE

Cheap, simple method with fast growth rate. Still in used in the industry for growing devices with simple structure

MBE

Expensive and highly accurate method. Attractive for material research. Also used in the industry to manufacture complex quantum structures or grow demanding materials (Ex: GaInNAs)

HVPE, Cl-VPE

Fast growth, in-situ cleaning & etching. Popular for regrowth processes

MOVPE

Versatile and robust. Widely used in the industry ELEC-E3140 Semiconductor physics

Transport processes in epitaxy

ELEC-E3140 Semiconductor physics

Lattice mismatch issues Lattice mismatch is usually a limitation. Examples: GaN on sapphire (13.5% lattice mismatch), InP on Silicon (7.5%)

• GaN bulk wafers cannot be grown neither by the Bridgman nor Czochralski method (requires up to pressure 6 GPa pressure!) heteroepitaxy 10 μm

• GaN is grown on sapphire (Al2O3), SiC, ZnO, LiAlO2 by MOVPE or HVPE • Lots of discolations due to lattice mismatch • But sometimes lattice mismatch is desired: quantum dot growth!

ELEC-E3140 Semiconductor physics

Heteroepitaxy If heteroepitaxy must be used: dislocations should be limited close to the substrate interface

GaN on sapphire Dislocation density >1010 cm-2 at the interface But ~ 108 cm-2 after a few micrometers of growth

ELEC-E3140 Semiconductor physics

Growth modes in epitaxy Frank-van der Merwe (2-d)

Volmer-Weber (3-d)

Stranski-Krastanow (2-d + 3-d)

Transition to 3-d growth after ultrathin strained wetting layer

ELEC-E3140 Semiconductor physics

Stranski-Krastanow growth mode Ge islands on Si not dislocated

140nm

50nm

Eaglesham, Cerullo, Phys. Rev. Lett. 64, 1943–1946 (1990)

Stress is not released by dislocation formation. Strain energy is accumulated both in the island and in the substrate.

ELEC-E3140 Semiconductor physics

Stranski-Krastanow growth Example: InAs island formation on GaAs surface

• InAs has 8% larger lattice constant than GaAs • After deposition of a very thin wetting layer of InAs (less than monolayers) small islands (~10 nm wide) are formed

ELEC-E3140 Semiconductor physics

Vapor-liquid-solid (VLS) growth of nanowires • • •

Gold particles are placed on the substrate Gold forms a liquid eutectic alloy with e.g. Ga, In or Si Supersaturationatoms from vapor are incorporated at the liquid solid interface below the liquid droplet a whisker is formed

ELEC-E3140 Semiconductor physics

VLS growth: Precursor molecule routes Growth temperature typically well below 500Cgrowth limited by reaction kinetics

@ L. Samuelsson, Lund University ELEC-E3140 Semiconductor physics

Outline Crystal defects Crystal growth and epitaxy Processing

ELEC-E3140 Semiconductor physics

Processing of wafers Typical fabrication processes Silicon wafers GaAs wafers - Cleaning of wafer - Cleaning of wafer - Oxidation - Epitaxy - Photolithography - Thin film growth - Etching - Photolithography - Doping - Metallisation - Thin film growth - Metallisation

ELEC-E3140 Semiconductor physics

Oxidation Oxidation of Si is an important process (SiO2 is used for masking, insulator, passivation) * Dry oxidation (thin oxides, high quality)

* Wet oxidation (thick oxides, lower quality) - Reaction with water vapor

* Thermal CVD process - From silane (SiH4), O2

PECVD

Oxidation ovens

* Plasma enhanced CVD process (PECVD) - From SiH4, N2O CVD = chemical vapor deposition ELEC-E3140 Semiconductor physics

Photolitography Litography (i.e., patterning) is the basis for fabrication of all the semiconductor devices. Typically mm-size features are needed. Photolitography is based on photosensitive resist (UV sensitive, yellow room). Resist is spread on the wafer by a spinning process: - Cleaning and pre-bake of wafer - Adding resist droplet - Spinning of wafer (thickness is determined by rotation speed) - Bake of wafer (increases adhesion)

Spinner ELEC-E3140 Semiconductor physics

Litography The next process is the exposure . Mask aligner is used to align the pattern with the markings on the wafer (can perform several patterning steps) and expose the areas through the mask. Then the exposed (positive resist) or unexposed (negative resist) areas are chemically removed.

Mask aligner

ELEC-E3140 Semiconductor physics

Etching - Wet etching using chemicals, e.g., HF etches SiO but it does not etch Si (selective etch). Often the etching speed depends on the crystallographic direction (anisotropic etch). - Dry etching using ions and chemicals in gaseous form - Plasma etching, surface is bombarded by ions accelerated in electric field (physical etching) · high energy => sputtering, not selective · low energy => also chemical reactions, ICP-RIE selective - Reactive ion etching (RIE) · mostly chemical reactions - Inductive coupled plasma RIE (ICP-RIE) · can select degree of physical and chemical etching

ELEC-E3140 Semiconductor physics

Wet vs. dry etching

ELEC-E3140 Semiconductor physics

Other processes - Doping by ion implatation (or diffusion) - Wafer bonding - Metallisation resistive electron beam sputtering

Resistive matallisation

DC-sputtering

Metallisation by e-beam evaporation ELEC-E3140 Semiconductor physics